AT89S51-24JU Atmel, AT89S51-24JU Datasheet - Page 11
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AT89S51-24JU
Manufacturer Part Number
AT89S51-24JU
Description
IC MCU 4K FLASH 24MHZ 44-PLCC
Manufacturer
Atmel
Series
89Sr
Datasheet
1.AT89S51-24JU.pdf
(31 pages)
Specifications of AT89S51-24JU
Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
UART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89S51-24JU
Manufacturer:
ATMEL
Quantity:
13 888
Part Number:
AT89S51-24JU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
10. Interrupts
2487D–MICRO–6/08
The AT89S51 has a total of five interrupt vectors: two external interrupts (INT0 and INT1), two
timer interrupts (Timers 0 and 1), and the serial port interrupt. These interrupts are all shown in
Figure
Each of these interrupt sources can be individually enabled or disabled by setting or clearing a
bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once.
Note that
should not write 1s to these bit positions, since they may be used in future AT89 products.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers
overflow. The values are then polled by the circuitry in the next cycle.
Table 10-1.
Symbol
EA
–
–
ES
ET1
EX1
ET0
EX0
User software should never write 1s to reserved bits, because they may be used in future AT89
products.
(MSB)
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables the interrupt.
10-1.
EA
Table 10-1
Interrupt Enable (IE) Register
–
shows that bit positions IE.6 and IE.5 are unimplemented. User software
Position
IE.7
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
–
ES
Function
Serial Port interrupt enable bit
External interrupt 1 enable bit
External interrupt 0 enable bit
Disables all interrupts. If EA = 0, no interrupt is
acknowledged. If EA = 1, each interrupt source is
individually enabled or disabled by setting or clearing its
enable bit.
Reserved
Reserved
Timer 1 interrupt enable bit
Timer 0 interrupt enable bit
ET1
(LSB)
EX1
ET0
AT89S51
EX0
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