PIC16F636-I/SL Microchip Technology, PIC16F636-I/SL Datasheet - Page 115

• Manufacturer Part Number: PIC16F636-I/SL
• Description: IC PIC MCU FLASH 2KX14 14-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F636-I/SL

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, WDT
• Number Of I /o: 11
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232, SPI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Data Rom Size: 256 B
• Height: 1.25 mm
• Length: 8.65 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 3.9 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162057 - MPLAB ICD 2 HEADER 14DIP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.2
The PIC12F635/PIC16F636/639 differentiates between
various kinds of Reset:
a)
b)
c)
d)
e)
f)
g)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Detect
FIGURE 12-1:
© 2005 Microchip Technology Inc.
Note 1:
MCLR/V
Power-on Reset (POR)
Wake-up Reset (WUR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Detect (BOD)
CLKI pin
OSC1/
V
Reset
DD
PP
Refer to the Configuration Word register (Register 12-1).
pin
LFINTOSC
OST/PWRT
Brown-out
V
Module
Detect
DD
Detect
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
WDT
Rise
BODEN<0>
OST
PWRT
SBODEN
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
BODEN
External Reset
Power-on Reset
Sleep
<1>
PIC12F635/PIC16F636/639
Preliminary
Wake-up Interrupt
RA3 Change
They are not affected by a WDT wake-up since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 12-3. These bits are
used in software to determine the nature of the Reset.
See Table 12-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse width specifications.
WURE
Sleep
Enable PWRT
Enable OST
S
R
DS41232B-page 113
Q
Chip_Reset