PIC16F722-I/SS Microchip Technology, PIC16F722-I/SS Datasheet - Page 5

• Manufacturer Part Number: PIC16F722-I/SS
• Description: IC PIC MCU FLASH 2KX14 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F722-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 8-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164307 - MODULE SKT FOR PM3 28SSOP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4. Module: External Oscillator
4.1 Minimum Operating Voltage for HS Mode
5. Module: CPU
5.1 Reset on Wake
6. Module: BOR
6.1 Current Draw in Sleep
 2011 Microchip Technology Inc.
The minimum device V
crystal oscillator in HS mode is 2.7V.
Work around
Use the internal oscillator or an external clock
source if operation below 2.7V is required for the
frequency range supported by HS mode.
Affected Silicon Revisions
If a wake from Sleep event occurs during the
execution of a Sleep command, the device may
reset. This Reset will be seen as a Power-on
Reset to the device.
Work around
1. Disable all asynchronous interrupt before
2. Make sure the timing of an asynchronous
Affected Silicon Revisions
With the BOR set to “Enabled during operation and
disabled during Sleep”, the device draws 2A
more during Sleep than when the BOR is set to
“Disabled”.
Work around
None.
Affected Silicon Revisions
A7
A7
A7
X
X
X
going to Sleep.
interrupt will not happen during the execution
of the Sleep instruction.
A9
A9
A9
X
X
X
AA
AA
AA
X
X
AB
AB
AB
X
X
DD
when using the external
AC
AC
AC
X
AD
AD
AD
X
AK
AK
AK
X
7. Module: WDT
7.1 CLRWDT Instruction after WDT Time-out
8. Module: Interrupts
After a WDT Reset, the TO bit of the STATUS
register remains clear until a SLEEP instruction or
CLRWDT instruction is issued, then, the TO bit will
be set. If the CLRWDT instruction is issued within 20
S of the Reset, the TO bit will remain clear.
Work around
Wait at least 20 S after a WDT Reset before using
the CLRWDT instruction.
Affected Silicon Revisions
The
addresses to the stack when vectoring to the
interrupt vector. Specifically, the interrupt vector
address 0x4 is incorrectly pushed to the stack after
the current PC, at the time the interrupt was
received, is pushed. This will cause the stack to
overflow if the user program is operating seven
calls deep when an interrupt arrives. Because the
stack is circular, the overflow causes the first stack
address to be overwritten.
Work around
Disable interrupts by clearing the GIE bit in the
INTCON register whenever the user program is
operating seven calls deep. This ensures that
interrupts will not cause the stack to overflow.
Affected Silicon Revisions
A7
A7
X
X
interrupt
A9
A9
X
X
AA
AA
PIC16(L)F72X
X
X
logic incorrectly pushes two
AB
AB
X
X
AC
AC
X
X
AD
AD
DS80382J-page 5
X
AK
AK
X