PIC16F688T-I/SL Microchip Technology, PIC16F688T-I/SL Datasheet - Page 64
![IC MCU PIC FLASH 4KX14 14SOIC](/photos/6/59/65933/150-14-soic_sml.jpg)
PIC16F688T-I/SL
Manufacturer Part Number
PIC16F688T-I/SL
Description
IC MCU PIC FLASH 4KX14 14SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
Specifications of PIC16F688T-I/SL
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Controller Family/series
PIC16F
No. Of I/o's
12
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT14SO-1 - SOCKET TRANSITION 14SOIC 150/208AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F688T-I/SL
PIC16F688T-I/SLTR
PIC16F688T-I/SLTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F688T-I/SL
Manufacturer:
BOURNS
Quantity:
45 000
Part Number:
PIC16F688T-I/SL
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F688
7.8
This feature can be used to time the duration or interval
of analog events. Clearing the T1GSS bit of the
CMCON1 register will enable Timer1 to increment
based on the output of Comparator C2. This requires
that Timer1 is on and gating is enabled. See
Section 6.0 “Timer1 Module with Gate Control” for
details.
It is recommended to synchronize Comparator C2 with
Timer1 by setting the C2SYNC bit when the comparator
is used as the Timer1 gate source. This ensures Timer1
does not miss an increment if the comparator changes
during an increment.
REGISTER 7-2:
DS41203E-page 62
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1
bit 0
Note 1:
U-0
—
2:
Comparator C2 Gating Timer1
Refer to Section 6.6 “Timer1 Gate”.
Refer to Figure 7-3.
Unimplemented: Read as ‘0’
T1GSS: Timer1 Gate Source Select bit
1 = Timer1 gate source is T1G pin (pin should be configured as digital input)
0 = Timer1 gate source is Comparator C2 output
C2SYNC: Comparator C2 Output Synchronization bit
1 = Output is synchronized with falling edge of Timer1 clock
0 = Output is asynchronous
U-0
—
CMCON1: COMPARATOR CONFIGURATION REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
—
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
7.9
The output of Comparator C2 can be synchronized with
Timer1 by setting the C2SYNC bit of the CMCON1
register. When enabled, the comparator output is
latched on the falling edge of the Timer1 clock source.
If a prescaler is used with Timer1, the comparator
output is latched after the prescaling function. To
prevent a race condition, the comparator output is
latched on the falling edge of the Timer1 clock source
and Timer1 increments on the rising edge of its clock
source. Reference the comparator block diagrams
(Figure 7-2 and Figure 7-3) and the Timer1 Block
Diagram (Figure 6-1) for more information.
U-0
—
(2)
Synchronizing Comparator C2
Output to Timer1
U-0
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
T1GSS
R/W-1
C2SYNC
R/W-0
bit 0