PIC12HV615-I/SN Microchip Technology, PIC12HV615-I/SN Datasheet - Page 93

• Manufacturer Part Number: PIC12HV615-I/SN
• Description: IC PIC MCU FLASH 1KX14 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12HV615-I/SN

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-SOIC (3.9mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS-232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 10-3:
TABLE 10-7:
© 2006 Microchip Technology Inc.
APFCON
CCP1CON
CCPR1L
CCPR1H
CMCON0
CMCON1
ECCPAS
INTCON
PIE1
PIR1
T2CON
TMR2
TRISIO
Legend: - = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the PWM.
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
Name
PRSEN
R/W-0
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Timer2 Module Register
For PIC12F615/HV615 only.
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1
CMON
Bit 7
P1M
GIE
—
—
—
—
—
—
PRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPASE must be cleared in software to restart the PWM
PDC<6:0>: PWM Delay Count bits
PDCn = Number of F
SUMMARY OF REGISTERS ASSOCIATED WITH PWM
R/W-0
PDC6
away; the PWM restarts automatically
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
PWM1CON: ENHANCED PWM CONTROL REGISTER
ADIE
ADIF
COUT
PEIE
Bit 6
should transition active and the actual time it transitions active
—
—
—
—
(1)
(1)
W = Writable bit
‘1’ = Bit is set
CCP1IE
CCP1IF
TRISIO5
DC1B1
CMOE
R/W-0
PDC5
Bit 5
T0IE
—
—
OSC
(1)
(1)
/4 (4 * T
TRISIO4
T1GSEL
PIC12F609/615/12HV609/615
CMPOL
DC1B0
T1ACS
INTE
Bit 4
—
—
R/W-0
PDC4
Preliminary
OSC
CCP1M3
TRISIO3
CMHYS
) cycles between the scheduled time when a PWM signal
CMIE
GPIE
CMIF
Bit 3
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
PDC3
CCP1M2
PSSAC0
TRISIO2
CMR
Bit 2
T0IF
—
—
—
—
TMR2IE
TMR2IF
CCP1M1
PSSBD1
TRISIO1
P1BSEL
T1GSS
INTF
Bit 1
—
R/W-0
PDC2
(1)
(1)
CMSYNC ---0 0-10 ---0 0-10
CCP1M0 0-00 0000 0-00 0000
PSSBD0 0000 0000 0000 0000
P1ASEL ---0 --00 ---0 --00
TRISIO0 --11 1111 --11 1111
TMR1IE -00- 0-00 -00- 0-00
TMR1IF -00- 0-00 -00- 0-00
CMCH
GPIF
Bit 0
x = Bit is unknown
R/W-0
PDC1
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 -0-0 0000 -0-0
0000 0000 0000 0000
0000 0000 0000 0000
POR, BOR
Value on
DS41302A-page 91
R/W-0
PDC0
Value on
all other
Resets
bit 0