STEVAL-TCS003V1 STMicroelectronics, STEVAL-TCS003V1 Datasheet
STEVAL-TCS003V1
Specifications of STEVAL-TCS003V1
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STEVAL-TCS003V1 Summary of contents
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Enhanced port expander with Keypad and PWM controller Features ■ 24 GPIOs ■ Operating voltage 1.8V ■ Hardware key pad controller (8*12 matrix max) ■ 8 Special Function Key support ■ 3 PWM (8 bit) output for LED brightness ...
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Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STMPE2403 7 System controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Contents 11 PWM controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STMPE2403 1 Block diagram Figure 1. Block diagram INT INT Main FSM Main FSM Main FSM + PWM + PWM + PWM + Rotator Control + Rotator Control + Rotator Control + GPIO Control + GPIO Control + GPIO Control ...
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Pin settings 2 Pin settings 2.1 Pin connection Figure 2. Pin connection 2.2 Pin assignment and TFBGA ball location Table 2. Pin assignment Ball Name C3 GND1 A6 KP_X0 C1 Reset_N A5 KP_X1 F1 KP_X2 F2 KP_X3 A2 KP_X4 B3 ...
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STMPE2403 Table 2. Pin assignment (continued) Ball Name B4 KP_X7 A1 KP_Y5 B2 KP_Y4 B5 KP_Y3 B6 KP_Y2 C5 KP_Y1 C6 KP_Y0 C4 GND3 D6 ADDR0 D5 KP_Y9 E6 KP_Y10 F6 KP_Y11 E5 PWM3 F5 PWM2 E4 PWM1 F4 VCC2 ...
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Pin settings 2.3 GPIO Pin functions Table 3. GPIO Pin functions Name Primary Function Alternate Function 1 Alternate Function 2 Alternate Function 3 KP_X0 GPIO 0 KP_X1 GPIO 1 KP_X2 GPIO 2 KP_X3 GPIO 3 KP_X4 GPIO 4 KP_X5 GPIO ...
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STMPE2403 2.4 Pin mapping to TFBGA ( bottom view, balls up) Table 4. Pin mapping to TFBGA ( bottom view, balls up KP_Y5 2 KP_X4 3 KP_X6 4 VCC1 5 KP_X1 6 KP_X0 B C KP_Y6 RESET XTALOUT ...
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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 3.1 Absolute maximum rating Table 5 ...
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STMPE2403 4 Electrical specification 4.1 DC electrical characteristics Table 7. DC electrical characteristics Symbol VCC1,2 Supply voltage I HIBERNATE mode HIBERNATE1 current I HIBERNATE mode HIBERNATE2 current I SLEEP mode current SLEEP1 I SLEEP mode current SLEEP2 Operating current Icc ...
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Electrical specification 4.3 DC input specification (1.55V < V < 1.95V) DD Table 9. DC input specification Symbol Vol Low level output voltage Voh High level output voltage Vol_PWM Low level output voltage Voh_PWM High level output voltage 4.4 DC ...
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STMPE2403 5 Register map All registers have the size of 8-bit. For each of the module, their registers are residing within the given address range. Table 12. Register map Address 0x00 – 0x07 Clock and power 0x80 – 0x81 Manager ...
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I2C Interface Interface The features that are supported by the I 2 ● Slave device ● Operates at 1.8V ● Compliant to Philip I ● Supports Standard (up to 100kbps) and Fast (up to ...
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STMPE2403 6.5 Slave device address The slave device address 10-bit address, where the least significant 2-bit are programmable. These 2-bit values will be loaded in once upon reset and after that these 2 pins no longer ...
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I2C Interface 6.7 Operation modes Table 14. Operation modes Mode Read Write Master/slave operation modes Figure ...
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STMPE2403 6.8 General call address A general call address is a transaction with the slave address of 0x00 and R When a general call address is made, STMPE2403 responds to this transaction with an acknowledgement and behaves as ...
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System controller 7 System controller The system controller is the heart of the STMPE2403. It contains the registers for power control, and the registers for chip identification. The system registers are: Table 16. System controller Address 0x00 0x01 0x02 0x03 ...
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STMPE2403 7.2 System control register Table 19. System control register Bit 7 6 Soft_Reset Clock_Source Disable_32KHz Sleep Enable_GPIO Enable_PWM Enable_KPC Enable_ROT Read Write (IIC) Reset 0 0 Value Table 20. System control register writing Bits Name 0 Enable_ROT ...
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System controller 7.3 System control register 2 Table 21. System control register 2 Bit 7 6 Reserved Reserved Read Write (IIC) Reset 0 0 Value Table 22. System control register 2 Bits Name 0 Sleep_0 1 Sleep_1 2 ...
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STMPE2403 7.4 States of operation The device has three main modes of operation: ● Operational Mode: This is the mode, whereby normal operation of the device takes place. In this mode, the RC clock is available and the Main FSM ...
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System controller 7.5 Autosleep Host system may configure the STMPE2403 to go into sleep mode automatically whenever there is a period of inactivity following a complete I2C transaction with the STMPE2403. This inactivity means there is no intended I2C transaction ...
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STMPE2403 8 Clocking system Figure 5. Clocking system The decision on clocks is based on the bits written into SYSCON registers. Bits the SYSCON register control the gating of clocks to the Rotator, Keypad Controller, PWM ...
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Clocking system 8.2 Power mode programming sequence To put the device in sleep mode, the following needs to be done by the host: Write a '1' to bit 4 of the SYSCON register. To wakeup the device, the following needs ...
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STMPE2403 9 Interrupt system STMPE2403 uses a highly flexible interrupt system. It allows host system to configure the type of system events that should result in an interrupt, and pinpoints the source of interrupt by status register. The INT pin ...
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Interrupt system 9.1 Register map of interrupt system Table 23. Register map of interrupt system Address Register name 0x10 0x11 0x12 0x13 0x14 0x15 0x16 IEGPIOR_msb 0x17 IEGPIOR_csb 0x18 IEGPIOR_lsb 0x19 ISGPIOR_msb 0x1A ISGPIOR_csb 0x1B ISGPIOR_lsb 26/63 ICR_msb Interrupt Control ...
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STMPE2403 9.2 Interrupt Control Register (ICR) ICR register is used to configure the Interrupt Controller. It has a global enable interrupt mask bit that controls the interruption to the host. ICR_msb Bit Reset 0 0 ...
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Interrupt system 9.3 Interrupt Enable Mask Register (IER) IER register is used to enable the interruption from a particular interrupt source to the host. IER_msb Bit Reset 0 0 Value Table 25. Register description Bits ...
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STMPE2403 9.4 Interrupt Status Register (ISR) ISR register monitors the status of the interruption from a particular interrupt source to the host. Regardless whether the IER bits are enabled or not, the ISR bits are still updated. ISR_msb Bit 15 ...
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Interrupt system 9.6 Interrupt Status GPIO Register (ISGPIOR) ISGPIOR register monitors the status of the interruption from a particular GPIO pin interrupt source to the host. Regardless whether the IEGPIOR bits are enabled or not, the ISGPIOR bits are still ...
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STMPE2403 9.7 Programming sequence To configure and initialize the Interrupt Controller to allow interruption to host, observe the following steps: ● Set the IER and IEGPIOR registers to the desired values to enable the interrupt sources that are to be ...
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GPIO controller 10 GPIO controller A total of 24 GPIOs are available in the STMPE2403 port expander IC. Most of the GPIOs are sharing physical pins with some alternate functions. The GPIO controller contains the registers that allow the host ...
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STMPE2403 Table 31. GPIO controller (continued) Address Register Name 0x9B GPAFR_U_msb 0x9C GPAFR_U_csb 0x9D GPAFR_U_lsb 0x9E GPAFR_L_msb 0x9F GPAFR_L_csb 0xA0 GPAFR_L_lsb 0xA1 MUX_CTRL 0xA5 COMPAT2401 0xA6 – 0xAF RESERVED 10.1 GPIO control registers A group of registers are used to ...
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GPIO controller The function of each bit is shown in the following table: Table 33. Bit function Register Name GPIO Monitor Pin State GPIO Set Pin State GPIO Clear Pin State GPIO Set Pin Direction GPIO Edge Detect Status GPIO ...
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STMPE2403 10.2 GPIO Alternate Function Register (GPAFR) GPAFR is to select the functionality of the GPIO pin. To select a function for a GPIO pin, a bit-pair in the register (GPAFR_U or GPAFR_L) has to be set. Bit 23 R/W ...
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GPIO controller Bit 23 22 AF11 R Reset 0 0 Value Bit 15 14 AF7 R Reset 0 0 Value Bit 7 6 AF3 R Reset 0 0 Value Table 35. Bit description Bits ...
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STMPE2403 10.3 Hot key feature A GPIO is known as ‘Hot Key’ when it is configured to trigger an interruption to the host whenever the GPIO input is being asserted. This feature is applicable in Operational mode ,as well as ...
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GPIO controller 10.4 MUX Control Register (MCR) STMPE2403 is integrated with 2 SPDT bi-directional signal multiplexer. The Ron of the multiplexer is 5 OHM (Typical). Signal level is 1.8V (MAX). The MUX are controlled by the MUX Control register. MCR ...
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STMPE2403 10.5 STMPE2401 Pin Compatibility Register (COMPAT2401) STMPE2403 is an enhanced version of the other port expander device, STMPE2401. However, the pin configuration of STMPE2403 is different from that of STMPE2401. For backward pin compatibility to STMPE2401, COMPAT2401 register provides ...
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PWM controller 11 PWM controller The STMPE2403 PWM controller provides 3 independent PWM outputs used to generate light effect; if the PWM outputs are not used, these pins can be used as GPIO. Figure 7. PWM controller Divide by “Step ...
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STMPE2403 11.1 Registers in the PWM controller The main system registers are: Table 39. Main system registers Address Register name 0x30 PWMCS 0x38 PWMIC0 0x39 PWMIC1 0x3A PWMIC2 Description PWM Control and Status register PWM instructions are initialized through this ...
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PWM controller 11.2 PWM Control and Status Register (PWMCS) Bit ExtSel Read/Write Reset Value Table 40. Bit description Bits Name 0 EN0 1 EN1 2 EN2 3 II0 4 II1 5 II2 6 ExtEn 7 ExtSel 42/ ...
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STMPE2403 11.3 PWM Instruction Channel x (PWMICx) This PWMICx is the dataport that allows the instructions to be loaded into the PWM channel. The loading of the instructions is achieved by continuously writing to this dataport. As this dataport address ...
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PWM controller Table 42. PWM commands (continued) Instruction LOAD Go to Start (GTS) Branch to the address 0x0 and execute from 0x0 and onwards. BRANCH END Trigger (TRIG) Table 43. Identification of Instructions Instruction Ramp LOAD GoToStart Branch End Trigger ...
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STMPE2403 Table 44. Instruction bit Instruction RAMP 0 Prescale Step Time 0= 1=512 0 = immediate action LOAD GTS BRANCH 1 01 END 1 10 TRIG 1 11 ...
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Keypad controller 12 Keypad controller The keypad controller consists of: 1) four dedicated key controllers that support up to four simultaneous dedicated key presses key scan controller and two normal key controllers that support a maximum of 12x8 ...
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STMPE2403 The keypad column inputs enabled by the KPC_col register are normally 'HIGH', with the corresponding input pins pulled up by resistors internally. After reset, all the keypad row outputs enabled by the KPC_row register are driven 'LOW ...
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Keypad controller Figure 10. Dedicated key configuration STMPE2403 Input 0-3 4*1212 (9648) Matrix Keys 4 Special Function Keys 04 Dedicated Keys 12.2 Registers in keypad controller Table 45. Registers in keypad controller Address Register Name 0x60 0x61 KPC_row_msb 0x62 KPC_row_lsb ...
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STMPE2403 12.3 KPC_col register Bit Name Read/Write RW Reset Value Table 46. Bit description Bit 12.4 KPC_row_msb register Bit Name ScanPW1 Read/Write RW Reset Value Table 47. Bit description Bit 7 6 ...
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Keypad controller 12.5 KPC_row_lsb register Bit Name Read/Write RW Reset Value Table 48. Bit description Bit 12.6 KPC_ctrl_msb register Bit Name Read/Write RW Reset Value Table 49. Bit description Bit 7 6 ...
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STMPE2403 12.7 KPC_ctrl_lsb register Bit Name Read/Write RW Reset Value Table 50. Bit description Bit 12.8 Data registers The KPC_DATA register contains three bytes of information. The first two bytes store the ...
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Keypad controller KPC_data_byte1 Register Bit Name Up/Down Read/Write Reset Value Table 52. Bit description Bit KPC_data_byte2 Register Bit Name Up/Down Read/Write Reset Value Table 53. Bit description Bit ...
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STMPE2403 KPC_data_byte3 Register Bit 7 Name SF7 Read/Write R Reset 1 Value Table 54. Bit description Bit KPC_data_byte4 Register Bit 7 Name - Read/Write R Reset 0 Value Table 55. Bit description ...
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Keypad controller 12.8.1 Resistance Maximum resistance between keypad output and keypad input, inclusive of switch resistance, protection circuit resistance and connection, must be less than 3.2 KΩ 12.8.2 Using the keypad controller It is not necessary to explicitly enable the ...
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STMPE2403 12.8.4 Priority of Key detection Dedicated key will always be detected enabled. When a Special Function key is detected, the matrix key scanning on the same input line will be disabled matrix keys ...
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Rotator controller 13 Rotator controller Rotator controller consists of 3 terminal, each capable of becoming an input with internal pull-up, or and output. At any moment, 2 terminals are inputs and one terminal is output. Figure 11. Rotator controller The ...
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STMPE2403 Figure 13. Registers for rotator control Address 0x70 0x72 Rotator_Control Bit Start_FSM Read/Write Reset Value Table 57. Bit description Bits Name 7 Start_FSM Rotator_Buffer Bit Symbol_Type Read/Write Reset Value Table 58. Bit description Bits 7 Symbol_Type 6~0 Symbol_Count Number ...
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Miscellaneous features 14 Miscellaneous features 14.1 Reset STMPE2403 is equipped with an internal POR circuit that holds the device in reset state, until the clock is steady and VCC input is valid. Host system may choose to reset the STMPE2403 ...
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STMPE2403 15 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on ...
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Package mechanical data Table 59. TFBGA Mechanical data Dim Figure 15. Package dimensions 60/63 mm. Min Typ Max 1.1 1 1.16 0.25 0.78 0.86 0.30 0.25 0.35 3.60 3.50 3.70 ...
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STMPE2403 Figure 16. Recommended footprint Figure 17. Tape and reel information Package mechanical data 61/63 ...
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Revision history 16 Revision history Table 60. Revision history Date 08-Jun-2007 62/63 Revision 1 Initial release STMPE2403 Changes ...
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... STMPE2403 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...