STEVAL-ILL004V1 STMicroelectronics, STEVAL-ILL004V1 Datasheet - Page 25

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STEVAL-ILL004V1

Manufacturer Part Number
STEVAL-ILL004V1
Description
EVAL BOARD PHASE CONTROL DIMMER
Manufacturer
STMicroelectronics
Type
Power Management: Lighting and Ballast Controllerr
Datasheets

Specifications of STEVAL-ILL004V1

Design Resources
STEVAL-ILL004V1 Gerber Files STEVAL-ILL004V1 Bill of Material STEVAL-ILL004V1 Schematic
Contents
Fully Assembled Evaluation Board
Product
Display Modules
For Use With/related Products
ST7FLITE09
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-5081
AN2263
6
Note:
Note:
Software
The software is written in C language, structured, and well-commented. It contains several
modules, but the main functions necessary for the proper operation of the evaluation board
reside in the following:
The overall code has less than 1.34 KB so that it will fit the ST7FLITE09 memory.
The working principle of using the TRIAC to drive either the incandescent lamp or one-
phase AC motor is to switch ON the TRIAC at the exact time in both half-periods of the sinus
wave. The TRIAC is closed automatically upon zero crossing detection. The minimum and
maximum opening time for the TRIAC is set as a constant value inside the software and it
can be easily modified in order to guarantee the requested power range for different
applications (see
The main idea of the software is to synchronize the internal timer inside the ST7FLITE09
microcontroller with the Zero Crossing (ZC) events of the mains sinusoidal waveform. The
voltage from the mains is applied on the PA0 pin which is set up as input interrupt in a pull-
up configuration. In the case of an internal counter that is not synchronized with the ZC
event, the user may have difficulty with the performance of the following interrupts:
1.
2.
This can influence the driver stability, if in one period the TRIAC is switched ON at a different
time, compared to the second one.
The 12-bit Auto-reload Timer (AT timer) is used in Output Compare (OC) mode. AT timer is
overflowed on address FFFh to the value set in Auto-reload (ATR, in this configuration,
0x000).
At each ZC event (see
CNTR plus the value corresponding with the 0.2 ms interval (0x640). At that time, the ZC is
synchronized on the mains. After that, each 0.2 ms OC interrupt occurs, where DCR = DCR
+ the value corresponding with the 0.2 ms interval (0x640). Each OC interrupt is
incremented by the software counter (see
The biggest advantage of this is that the CNTR register is readable at any time and the new
value can be written immediately to the DCR register without any delay. The 0.2 ms interval
is the smallest step required for firing the TRIAC.
To increase power on reliability and EMC robustness, a HW watchdog and the highest LVD
is used (option byte setting).
main.c
ports.c
pwm_ar_timer_12bit.c
lite_timer_8bit.c
adc_8bit.c
Interrupt from the input pin
Interrupt from the timer (e.g. overflow interrupt)
Section 3
Figure
for more details).
21), the DCR register is filled by the actual counter state from
Figure
22).
Software
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