HSC-ADC-EVALA-DC Analog Devices Inc, HSC-ADC-EVALA-DC Datasheet
HSC-ADC-EVALA-DC
Specifications of HSC-ADC-EVALA-DC
Related parts for HSC-ADC-EVALA-DC
HSC-ADC-EVALA-DC Summary of contents
Page 1
... DAC evaluation and the following ADC data capture boards for ADC evaluation: • HSC-ADC-EVALA • HSC-ADC-EVALB • HSC-ADC-EVALC PRODUCT HIGHLIGHTS 1. Quick set up of both ADC and DAC characterization 2. Easy testing of ADCs with reference DACs and DACs with reference ADCs 3 ...
Page 2
AN-905 TABLE OF CONTENTS Introduction ...................................................................................... 1 Product Highlights ........................................................................... 1 Installation of VisualAnalog............................................................ 3 Instruction Notes.......................................................................... 3 Quick Start for ADC Evaluation..................................................... 4 VisualAnalog Software..................................................................... 6 Starting VisualAnalog.................................................................. 6 Using the Start-Up Form ............................................................. 6 Opening a Blank Canvas ...
Page 3
INSTALLATION OF VisualAnalog To install VisualAnalog, you must have the following: • Administrator privileges • Microsoft® .NET Framework Version 1.1 • The latest .NET Framework 1.1 service packs The VisualAnalog installation package installs all of the items needed to use ...
Page 4
... Figure 3. New Canvas Form 5. Select the FFT icon and click Open you have an HSC-ADC-EVALC data capture board, a dialog box that asks for permission to configure the on board FPGA may appear. If you prefer to use the current FPGA configuration, click No to bypass configuration. ...
Page 5
Figure 6. Main Form and Graph Form To view the time domain representation of the captured data, click Toggle Additional Plot on the graph form. See the Components Overview section for more information. Figure 7. Toggle Additional Plot Button Rev. ...
Page 6
AN-905 VisualAnalog SOFTWARE STARTING VISUALANALOG After installing the VisualAnalog software, a Start menu item and a desktop icon should appear. To use the Start menu item, click Start, select Programs, select Analog Devices, click VisualAnalog, and select VisualAnalog. To use ...
Page 7
... When the software detects a particular device ID that exists in the table, it can choose a default FPGA configuration file. Note that this process only occurs when using the HSC-ADC-EVALC. Select the Existing tab to browse for an existing canvas file. VisualAnalog maintains a list of the last five recently accessed canvas files ...
Page 8
AN-905 Figure 14. VisualAnalog Main Form Rev Page ...
Page 9
SETTING CANVAS PROPERTIES VisualAnalog allows you to set properties that describe the canvas and the way it behaves. To access the canvas properties, click Canvas > (Display Name) Properties… blank canvas is opened, (Display Name) appears as Untitled. ...
Page 10
AN-905 1 8 CONNECTING COMPONENTS To connect two components together, place a wire from the output node of one component to the input node of another, or vice versa. To place a new wire, use one of the following techniques: ...
Page 11
Figure 21. Connecting Components Rev Page AN-905 ...
Page 12
AN-905 When you connect and move components, wires route on the canvas automatically. If the diagram begins to look convoluted, try reorganizing some components to force the wires to reroute. To connect the end of an existing wire to a ...
Page 13
Figure 24. ADC Model and Settings Form 3. In Input Formatter (see Figure 25 through Figure 27), click the Settings….button Then change the Number Format to two’s complement. Next, change both the Resolution and Alignment to 14. Click OK. Figure ...
Page 14
AN-905 MAKING LAYOUT CHANGES Most layout changes require that you select an object first. To select a component or wire, click the mouse somewhere on the object. If you are trying to select a component, be sure to click somewhere ...
Page 15
Figure 30. Menu Bar File New—Opens a blank canvas used for building a new component diagram. Open—Loads an existing canvas using a standard file browser. Close—Shuts down the current canvas. If you have changed the canvas since the last save, ...
Page 16
... ADC Devices contains options that affect the behavior of VisualAnalog when interfacing with ADC data capture boards. HSC-ADC-EVALC FPGA Configuration allows you to adjust automatic FPGA configuration settings for the HSC ADC-EVALC by selecting one of three options. These options only have an effect when choosing a template from the startup form that corresponds to a detected ADC device ...
Page 17
DATA TYPES OVERVIEW VisualAnalog components transfer information through wires. The wires themselves can carry any type of data, but most component inputs have limitations on what types of data they can accept. Most components that have an output pass a ...
Page 18
... To access these forms, click the Settings button on the component. BOARD INTERFACES The following sections are a basic overview of the functionality of the components. Figure 38. DAC Pattern Generator Figure 37. Settings Button Figure 39. HSC-ADC-EVALC (ADC Data Capture Board) Rev Page ...
Page 19
... Maximum Poll Time so the software stops polling after a certain amount of time if it never receives a full flag. Note that this setting is not recommended for the HSC-ADC-EVALC because the FPGA configuration may not use a full flag. FPGA allows you to adjust FPGA settings specifically for the HSC-ADC-EVALC board. You can program the on-board Xilinx® ...
Page 20
AN-905 DAC PATTERN GENERATOR INTERFACE The DAC Pattern Generator Interface provides access to the physical DPG board via a standard USB interface. This tool handles all of the hardware interfacing and data formatting issues that are required to move data ...
Page 21
Table 3. Serialized LVDS Tuning Controls Control Description Retune Manual trigger to retune the clock and data bits on Button the serialized LVDS port. The alignment type is based on the selected mode (aligned or centered). Tuning is automatically performed ...
Page 22
... FIFOs. Normally, the HSC-ADC-EVALA and HSC-ADC-EVALB boards have 32-KB devices possible to reconfigure them with compatible 256-KB devices. The HSC-ADC-EVALC board can support various sample sizes, depending on the current FPGA configuration. In addition, you can select the channels to enable which devices are present ...
Page 23
COMPONENTS MODELS In many instances, it may be desirable to use behavioral models instead of real devices, such as when test hardware is not avail- able device is in preselection phase. No matter the case, VisualAnalog supports ...
Page 24
AN-905 COMPONENTS PROCESSES These functional blocks provide basic numeric processing asso ciated with converter testing. These blocks can be cascaded to create more complex evaluation processes. ARRAY MATH The Array Math component performs array arithmetic on two or more inputs. ...
Page 25
COMPLEX WAVEFORM MERGER The Complex Waveform Merger component merges two real waveforms into a complex interleaved waveform. The real input is on the top and the quadrature input is on the bottom. Figure 54. Complex Waveform Merger COMPLEX WAVEFORM SPLITTER ...
Page 26
AN-905 The grid in the User-Defined tab lists computations that the FFT Analysis component performs on the input data. Note that the routine performs these computations in order, from top to bottom. Name—Sets the display name for this calculation. This ...
Page 27
HILBERT TRANSFORM Hilbert Transform performs a Hilbert transform on a real waveform to compute the resulting complex waveform. The output is the complex waveform that consists of the real input waveform as I data, along with its Q data counterpart. ...
Page 28
AN-905 MIXER Mixer performs a complex frequency shift of the input wave form and produces real or complex waveform output. For complex input, the complex output option is required. The translation frequency may be positive or negative. Figure 67. Mixer ...
Page 29
RESAMPLER Resampler resamples the input waveform to a given output sample rate. Use this component for up or down sampling. Figure 71. Resampler RESOLUTION FORMATTER Resolution Formatter rounds or truncates the input data to a given bit resolution. There is ...
Page 30
AN-905 COMPONENTS RESULTS DATA GRID Data Grid displays data in a tabular format. This works on all data sets both in time and frequency domains. It also works with most other data types. Copy data from the Data Grid and ...
Page 31
Figure 80. Graph Settings Form, General Tab The Display portion of the General tab allows you to set the text displayed across the title bar of the graph component. You can also append the current date and/or time. The Graph ...
Page 32
AN-905 Figure 83. Graph Settings Form, Plot Settings Tab Use the drop-down box to select a plot whose properties you want to adjust. Turn highlights on/off using the Show Highlights check box. Highlights draw attention to certain parts of graphed ...
Page 33
COMPONENTS SOURCES FILTER MASK Filter Mask defines a single-sided spectral mask that can be applied to any frequency domain signal. This mask can be any type of filter, including low-pass, band-pass, high-pass, band- reject, multi-pass, or multi-reject options. You can ...
Page 34
AN-905 TONE GENERATOR Tone Generator generates ideal sine waves. This block allows the sample frequency and data size to be specified. Use the composite amplitude text to set the amplitude of multiple tones relative to 0 dB. The Use Composite ...
Page 35
VisualAnalog EXAMPLE CANVASES ADC WITH ADC DATA CAPTURE BOARD VisualAnalog is ideal for capturing and processing data from an ADC with one of the ADC data capture boards provided by Analog Devices. Figure 90 shows a template used to capture ...
Page 36
AN-905 In Figure 91, a Tone Generator generates a single sine wave at 70.3 MHz with a sample clock of 122.88 MSPS. This vector is sent to the AD9246 ADIsimADC converter model where it is digitized and converted to bits. ...
Page 37
Figure 92 shows a complex data set that is loaded and split into real and imaginary components (I and Q) and then digitized by dual ADCs. The output of the ADCs is then formatted back to the normalized VisualAnalog format ...
Page 38
AN-905 LOADING THE DPG WITH A SIMPLE VECTOR Figure 93 shows how to load a simple vector from a file and then pass it to the DPG for use with one of many standard DACs. Depending on the DAC, data ...
Page 39
LOADING THE DPG WITH A COMPLEX VECTOR VisualAnalog can be used to load a simple vector from a file and then manipulate that file before it is sent to the DPG. Figure 94 shows how to load a file, duplicate ...
Page 40
AN-905 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN06683-0-4/07(0) Rev Page ...