C8051F300-TB Silicon Laboratories Inc, C8051F300-TB Datasheet - Page 18

• Manufacturer Part Number: C8051F300-TB
• Description: BOARD PROTOTYPING W/C8051F300
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F300-TB

• Contents: Board
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F300
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F300/1/2/3/4/5
1.2.
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of
RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of
general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
The C8051F300/1/2/3 includes 8k bytes of Flash program memory (the C8051F304 includes 4k bytes; the
C8051F305 includes 2k bytes). This memory may be reprogrammed in-system in 512 byte sectors, and
requires no special off-chip programming voltage. See Figure 1.5 for the C8051F300/1/2/3 system memory
map.
18
0x1DFF
0x1E00
0x0000
On-Chip Memory
PROGRAM MEMORY
Programmable in 512
Figure 1.5. On-chip Memory Map (C8051F300/1/2/3 Shown)
Byte Sectors)
RESERVED
(In-System
8k bytes
FLASH
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 2.9
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
Registers
Only)
DATA MEMORY
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's