STM8/128-EVAL STMicroelectronics, STM8/128-EVAL Datasheet - Page 15

BOARD EVAL FOR STM8S

STM8/128-EVAL

Manufacturer Part Number
STM8/128-EVAL
Description
BOARD EVAL FOR STM8S
Manufacturer
STMicroelectronics
Type
MCUr
Datasheets

Specifications of STM8/128-EVAL

Mfg Application Notes
STM8S Getting Started
Contents
Evaluation Board
Silicon Manufacturer
ST Micro
Core Architecture
STM8
Core Sub-architecture
STM8
Silicon Core Number
STM8
Silicon Family Name
STM8S2xx
Kit Contents
Board
For Use With/related Products
STM8S2xx
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8506

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM8/128-EVAL
Manufacturer:
ST
0
STM8S207xx, STM8S208xx
4.4
Flash program and data EEPROM memory
Write protection (WP)
Write protection of Flash program memory and data EEPROM is provided to avoid
unintentional overwriting of memory that could result from a user software malfunction.
There are two levels of write protection. The first level is known as MASS (memory access
security system). MASS is always enabled and protects the main Flash program memory,
data EEPROM and option bytes.
To perform in-application programming (IAP), this write protection can be removed by writing
a MASS key sequence in a control register. This allows the application to write to data
EEPROM, modify the contents of main program memory or the device option bytes.
A second level of write protection, can be enabled to further protect a specific area of
memory known as UBC (user boot code). Refer to
The size of the UBC is programmable through the UBC option byte
increments of 1 page (512 bytes) by programming the UBC option byte in ICP mode.
This divides the program memory into two areas:
The UBC area remains write-protected during in-application programming. This means that
the MASS keys do not unlock the UBC area. It protects the memory used to store the boot
program, specific code libraries, reset and interrupt vectors, the reset routine and usually the
IAP and communication routines.
Figure 2.
Up to 128 Kbytes of high density Flash program single voltage Flash memory
Up to 2K bytes true data EEPROM
Read while write: Writing in data memory possible while executing code in program
memory.
User option byte area
Main program memory: Up to 128 Kbytes minus UBC
User-specific boot code (UBC): Configurable up to 128 Kbytes
Up to
128 Kbytes
Flash
program
memory
Data
EEPROM
memory
Flash memory organisation
Remains write protected during IAP
Data memory area (2 Kbytes)
Write access possible for IAP
Doc ID 14733 Rev 11
Program memory area
Option bytes
UBC area
Figure
2.
Programmable area from 1 Kbyte
(2 first pages) up to 128 Kbytes
(1 page steps)
(Table
Product overview
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