AT91SAM9XE-EK Atmel, AT91SAM9XE-EK Datasheet - Page 11

• Manufacturer Part Number: AT91SAM9XE-EK
• Description: KIT EVAL FOR AT91SAM9XE
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9XE-EK

• Contents: Evaluation Board, Power Supply with adapters, Cables and software
• Processor To Be Evaluated: AT91SAM9XE
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB
• Core: ARM
• Operating Supply Voltage: 5 V
• Kit Contents: Board Cable Power Supply CD
• Supported Devices: AT91SAM9XE
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Development Tool Type: Hardware / Software - Eval/Demo Board
• Rohs Compliant: Yes
• Mcu Supported Families: AT91SAM
• For Use With/related Products: AT91SAM9XE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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AT91SAM9XE-EK Evaluation Board User Guide
Incorporates the ARM926EJ-S
Additional Embedded Memories
Enhanced Embedded Flash Controller (EEFC)
External Bus Interface (EBI)
USB 2.0 Full Speed (12 Mbits per second) Device Port
USB 2.0 Full Speed (12 Mbits per second) Host Single Port in the 208-pin PQFP Device and Double Port in 217-ball LFBGA
Device
Ethernet MAC 10/100 Base-T
Image Sensor Interface
Bus Matrix
– DSP instruction Extensions, ARM Jazelle
– 8 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer
– 200 MIPS at 180 MHz
– Memory Management Unit
– EmbeddedICE
– One 32 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed
– One 32 Kbyte (for AT91SAM9XE256 and AT91SAM9XE512) or 16 Kbyte (for AT91SAM9XE128) Internal SRAM, Single-cycle
– 128, 256 or 512 Kbytes of Internal High-speed Flash for AT91SAM9XE128, AT91SAM9XE256 or AT91SAM9XE512
– Interface of the Flash Block with the 32-bit Internal Bus
– Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory Interface
– Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlash
– On-chip Transceiver, 2,688-byte Configurable Integrated DPRAM
– Single or Dual On-chip Transceivers
– Integrated FIFOs and Dedicated DMA Channels
– Media Independent Interface or Reduced Media Independent Interface
– 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
– ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
– 12-bit Data Interface for Support of High Sensibility Sensors
– SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
– Six 32-bit-layer Matrix
– Remap Command
Access at Maximum Matrix Speed
Respectively. Organized in 256, 512 or 1024 Pages of 512 Bytes Respectively.
• 128-bit Wide Access
• Fast Read Time: 60 ns
• Page Programming Time: 4 ms, Including Page Auto-erase,
• 10,000 Write Cycles, 10 Years Data Retention, Page Lock Capabilities, Flash Security Bit
Full Erase Time: 10 ms
AT91SAM9XE 512/256/128 Microcontroller
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, Debug Communication Channel Support
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ARM
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Thumb
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Technology for Java
Processor
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Acceleration
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Board Description
6311A–ATARM–04-Feb-08
Section 3
3-1