LM96000EVAL/NOPB National Semiconductor, LM96000EVAL/NOPB Datasheet - Page 8

• Manufacturer Part Number: LM96000EVAL/NOPB
• Description: BOARD EVALUATION LM96000
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM96000EVAL/NOPB

• Sensor Type: Temperature, Fan Controller
• Sensing Range: 0°C ~ 125°C
• Interface: SMBus (2-Wire/I²C)
• Sensitivity: ±1°C
• Voltage - Supply: 3 V ~ 3.6 V
• Embedded: No
• Utilized Ic / Part: LM96000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM96000EVAL

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Functional Description
1.0 SMBUS
The LM96000 is compatible with devices that are compliant
to the SMBus 2.0 specification. More information on this bus
can be found at: http://www.smbus.org/. Compatibility of SM-
Bus2.0 to other buses is discussed in the SMBus 2.0 speci-
fication.
1.1 Addressing
LM96000 is designed to be used primarily in desktop systems
that require only one monitoring device.
If only one LM96000 is used on the motherboard, the designer
should be sure that the PWM3/Address Enable pin is High
during the first SMBus communication addressing the
LM96000. PWM3/Address Enable is an open drain I/O pin
that at power-on defaults to the input state of Address En-
able. A maximum of 10k pull-up resistance on PWM3/Ad-
dress Enable is required to assure that the SMBus address
of the device will be locked at 010 1110b, which is the default
address of the LM96000.
In this way, up to three LM96000 devices can exists on an
SMBus at any time. Multiple LM96000 devices can be used
to monitor additional processors and temperature zones.
When using the non-default addresses the TACH4 and
PWM3 will not function. As shown in the timing diagram the
Address Enable
0
0
1
Address Select
0
1
X
Address Latch Enable low during and after first communication
Address Latch Enable high during first communication
Board Implementation
Pulled to ground through a 10 kΩ resistor
Pulled to 3.3V or to GND through a 10 kΩ resistor
Pulled to 3.3V through a 10 kΩ resistor
8
During the first SMBus communication TACH4 and PWM3
can be used to change the SMBus address of the LM96000
to 0101101b or 0101100b. LM96000 address selection pro-
cedure:
Address Enable pin must remain low in order for the latched
address to remain in effect. If the address enable pin is pulled
high after the first SMBus communication, then the LM96000
SMBus address will revert to the default value (2Eh) after the
first five clocks of next SMBus communication.
A 10 kΩ pull-down resistor to ground on the PWM3/
Address Enable pin is required. Upon power up, the
LM96000 will be placed into Address Enable mode and
assign itself an SMBus address according to the state of
the Address Select input. The LM96000 will latch the
address during the first valid SMBus transaction in which
the first five bits of the targeted address match those of the
LM96000 address, 0 1011b. This feature eliminates the
possibility of a glitch on the SMBus interfering with address
selection. When the PWM3/Address Enable pin is not
used to change the SMBus address of the LM96000, it will
remain in a high state until the first communication with the
LM96000. After the first SMBus transaction is completed
PWM3 and TACH4 will return to normal operation.
20084610
SMBus Address
010 1100b, 2Ch
010 1101b, 2Dh
010 1110b, 2Eh
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