LM64EVAL National Semiconductor, LM64EVAL Datasheet - Page 18

• Manufacturer Part Number: LM64EVAL
• Description: BOARD EVALUATION LM64
• Manufacturer: National Semiconductor

Specifications of LM64EVAL

• Sensor Type: Temperature, Fan Controller
• Sensing Range: 0°C ~ 85°C
• Interface: SMBus (2-Wire/I²C)
• Sensitivity: ±1°C
• Voltage - Supply: 3 V ~ 3.6 V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: LM64
• Lead Free Status / RoHS Status: Not applicable / Not applicable

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Address
4A
4B
2.0 LM64 Registers
2.4 LM64 REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER
Fan Control Registers
Hex
HEX
HEX
4A
4B
PWM AND RPM REGISTER
FAN SPIN-UP CONFIGURATION REGISTER
Read/
Write
R/W
R/W
Bits
7:6
1:0
7:6
4:3
2:0
5
4
3
2
5
Value
POR
111
00
00
11
1
0
0
0
0
1
(Continued)
PWM Clock
Tachometer
Tachometer
[Reserved]
Duty Cycle
Program
Spin-Up
Spin-Up
Spin-Up
Polarity
Output
Name
Select
PWM
PWM
Mode
PWM
PWM
Time
Fast
These bits are unused and always set to 0.
0: the PWM Value (register 4C) and the Lookup Table (50–5F) are
read-only. The PWM value (0 to 100%) is determined by the current
remote diode temperature and the Lookup Table, and can be read from
the PWM value register.
1: the PWM value (register 4C) and the Lookup Table (Register 50–5F)
are read/write enabled. Writing the PWM Value register will set the
PWM output. This is also the state during which the Lookup Table can
be written.
0: the PWM output pin will be 0 V for fan OFF and open for fan ON.
1: the PWM output pin will be open for fan OFF and 0 V for fan ON.
if 0, the master PWM clock is 360 kHz
if 1, the master PWM clock is 1.4 kHz.
Always write 0 to this bit.
00: Traditional tach input monitor, false readings when under minimum
detectable RPM.
01: Traditional tach input monitor, FFFF reading when under minimum
detectable RPM.
10: Most accurate readings, FFFF reading when under minimum
detectable RPM.
11: Least effort on programmed PWM of fan, FFFF reading when under
minimum detectable RPM.
Note: If the PWM Clock is 360 kHz, mode 00 is used regardless of the
setting of these two bits.
These bits are unused and always set to 0
If 0, the fan spin-up uses the duty cycle and spin-up time, bits 0–4.
If 1, the LM64 sets the PWM output to 100% until the spin-up times out
(per bits 0–2) or the minimum desired RPM has been reached (per the
Tachometer Setpoint setting) using the tachometer input, whichever
happens first. This bit overrides the PWM Spin-Up Duty Cycle register
(bits 4:3) — PWM output is always 100%.
If PWM Spin-Up Time (bits 2:0) = 000, the Spin-Up cycle is bypassed,
regardless of the state of this bit.
00: Spin-Up cycle bypassed (no Spin-Up), unless Fast Tachometer
Terminated Spin-Up (bit 5) is set.
01: 50%
10: 75%–81% Depends on PWM Frequency. See Applications Notes.
11: 100%
000: Spin-Up cycle bypassed (No Spin-Up)
001: 0.05 seconds
010: 0.1 s
011: 0.2 s
100: 0.4 s
101: 0.8 s
110: 1.6 s
111: 3.2 s
18
Description