CDB4392 Cirrus Logic Inc, CDB4392 Datasheet - Page 18

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CDB4392

Manufacturer Part Number
CDB4392
Description
EVALUATION BOARD FOR CS4392
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB4392

Number Of Dac's
2
Number Of Bits
24
Outputs And Type
2, Differential
Sampling Rate (per Second)
192k
Data Interface
Serial
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS4392
Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
For Use With/related Products
CS4392
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
6.
** All registers are read/write in Two-Wire mode and write only in SPI mode, unless otherwise noted**
6.1
6.1.1
6.1.2
18
AMUTE
DIF2
0
0
0
0
1
1
1
1
REGISTER DESCRIPTION
7
Mode Control 1 - Address 01h
Function:
Function:
Auto-Mute (Bit 7)
Digital Interface Formats (Bits 6:4)
The Digital-to-Analog converter output will mute following the reception of 8192 consecutive audio
samples of static 0 or -1. A single sample of non-static data will release the mute. Detection and
muting is done independently for each channel. (However, Auto-Mute detection and muting can be-
come dependent on either channel if the Mute A = B function is enabled.) The common mode on the
output will be retained and the Mute Control pin for that channel will go active during the mute period.
The muting function is effected, similar to volume control changes, by the Soft and Zero Cross bits in
the Volume and Mixing Control register.
PCM Mode - The required relationship between the Left/Right clock, serial clock and serial data is
defined by the Digital Interface Format and the options are detailed in Table 8 and Figures 4-6.
DIF1
0
0
1
1
0
0
1
1
DIF2
6
DIFO
0
1
0
1
0
1
0
1
Table 8. Digital Interface Formats - PCM Modes
DIF1
5
Left Justified, up to 24-bit data (default)
Right Justified, 16-bit Data
Right Justified, 24-bit Data
Right Justified, 20-bit Data
Right Justified, 18-bit Data
DIF0
4
I
2
S, up to 24-bit data
DESCRIPTION
Reserved
Reserved
DEM1
3
DEM0
2
Format
0
1
2
3
4
5
FM1
1
Figure
CS4392
DS459PP3
4
5
6
6
6
6
FM0
0

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