STEVAL-ISA025V1 STMicroelectronics, STEVAL-ISA025V1 Datasheet - Page 21

EVAL BOARD 30A 400KHZ L6730

STEVAL-ISA025V1

Manufacturer Part Number
STEVAL-ISA025V1
Description
EVAL BOARD 30A 400KHZ L6730
Manufacturer
STMicroelectronics
Type
DC/DC Switching Converters, Regulators & Controllersr
Datasheets

Specifications of STEVAL-ISA025V1

Design Resources
STEVAL-ISA025V1 Gerber Files STEVAL-ISA025V1 Schematic STEVAL-ISA025V1 Bill of Materials
Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Voltage - Output
3.3V
Current - Output
30A
Voltage - Input
4.5 ~ 14V
Regulator Topology
Buck
Frequency - Switching
400kHz
Board Type
Fully Populated
Utilized Ic / Part
L6730
Input Voltage
4.5 V to 14 V
Output Voltage
3.3 V
Product
Power Management Modules
Silicon Manufacturer
ST Micro
Silicon Core Number
L6730
Kit Application Type
Power Management - Voltage Regulator
Rohs Compliant
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
L6730
Other names
497-5868

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STEVAL-ISA025V1
Manufacturer:
STMicroelectronics
Quantity:
1
L6730 - L6730B
5.8
negative. This situation happens when the converter is sinking current for example and, in
this case, an adaptive dead time control operates.
Figure 13. Dead times
Monitoring and protection
The output voltage is monitored by the FB pin. If it is not within ±10% (typ.) of the
programmed value, the Power-Good (PGOOD) output is forced low. The PGOOD signal can
be delayed by adding an external capacitor on PGDelay pin (see
and
calculated with the following formula:
The device provides over voltage protection: when the voltage sensed on FB pin reaches a
value 20% (typ) greater than the reference, the low-side driver is turned on. If the OVP not-
latched mode has been set the low-side MOSFET is kept on as long as the overvoltage is
detected (see
Figure
14.); this can be useful to perform cascade sequencing. The delay can be
Figure
15.).The OVP latched-mode has been set the low-side MOSFET is
Doc ID 11938 Rev 3
PGDelay
= 5 .
0
C
( )
pF
Table 4: Pin connection
Device description
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