MAX1231EVKIT Maxim Integrated Products, MAX1231EVKIT Datasheet - Page 8

• Manufacturer Part Number: MAX1231EVKIT
• Description: EVAL KIT FOR MAX1231
• Manufacturer: Maxim Integrated Products

Specifications of MAX1231EVKIT

• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 300k
• Data Interface: Serial
• Inputs Per Adc: 16 Single Ended or 8 Differential
• Input Range: ±VREF/2
• Power (typ) @ Conditions: 1.86mW @ 300kSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Utilized Ic / Part: MAX1231
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
8
MAX1231
TQFN-EP
2–12, 26,
1, 17, 19,
27, 28,
_______________________________________________________________________________________
—
—
13
—
—
14
—
—
15
16
18
20
21
22
23
24
25
—
MAX1231
QSOP
1–14
—
—
15
—
—
16
—
—
17
18
19
20
21
22
23
24
—
—
MAX1229 MAX1227
1–10
11
12
13
14
15
16
17
18
19
20
—
—
—
—
—
—
—
—
1–6
10
11
12
13
14
15
16
—
—
—
—
—
—
—
—
7
8
9
REF-/AIN14
REF-/AIN10
REF-/AIN6
AIN0–13
AIN0–9
AIN0–5
NAME
AIN15
AIN11
SCLK
DOUT
REF+
AIN7
GND
N.C.
V
DIN
EP
DD
/
/
/
Analog Inputs
Analog Inputs
Analog Inputs
Negative Input for External Differential Reference/Analog Input 14.
See Table 3 for details on programming the setup register.
Negative Input for External Differential Reference/Analog Input 10.
See Table 3 for details on programming the setup register.
Negative Input for External Differential Reference/Analog Input 6.
See Table 3 for details on programming the setup register.
Active-Low Conversion Start Input/Analog Input 15. See Table 3
for details on programming the setup register.
Active-Low Conversion Start Input/Analog Input 11. See Table 3
for details on programming the setup register.
Active-Low Conversion Start Input/Analog Input 7. See Table 3 for
details on programming the setup register.
Positive Reference Input. Bypass to GND with a 0.1µF capacitor.
Ground
Power Input. Bypass to GND with a 0.1µF capacitor.
Serial Clock Input. Clocks data in and out of the serial interface.
(Duty cycle must be 40% to 60%.) See Table 3 for details on
programming the clock mode.
Active-Low Chip Select Input. When
is enabled. When
Serial Data Input. DIN data is latched into the serial interface on
the rising edge of SCLK.
Serial Data Output. Data is clocked out on the falling edge of
SCLK. High impedance when
End of Conversion Output. Data is valid after
No Connection. Not internally connected.
Exposed Pad (TQFN Only). Connect to GND.
is high, DOUT is high impedance.
FUNCTION
is connected to V
Pin Description
is low, the serial interface
pulls low.
DD
.