ELXLEVK01 National Semiconductor, ELXLEVK01 Datasheet - Page 22

• Manufacturer Part Number: ELXLEVK01
• Description: KIT EVAL EASYLINK DS32ELX0421
• Manufacturer: National Semiconductor

Specifications of ELXLEVK01

• Main Purpose: Interface, LVDS
• Embedded: No
• Utilized Ic / Part: DS32ELX0421
• Primary Attributes: 6.25 Gbps, Serializer with DDR LVDS Parallel 5-Bit LVDS Interface
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

www.national.com
05
06
07–1F Reserved
20
21
22
23 Reserved
24
25 Reserved
(Hex)
Addr
Device Config
Device Config
De-Emphasis
Delay Enable
LVDS Clock
Override
GP Out
Name
GP In
7:3
2
1
0
7:3
2
1
0
7:3
2
1:0
7
6
5
4
3
2
1:0
7:5
4
3
2
1
0
7
6:0
Bits
Reserved
GP In 2
GP In 1
GP In 0
Reserved
GP Out 2
GP Out 1
GP Out 0
Reserved
Pin Override
De-emphasis
level
NRZI enable
DV disable
Reserved
Scrambler
Enable
DC Bal encoder
bypass
Training
Sequence
Enable
Device
Configuration
Reserved
NRZ bypass
override
Scrambler
bypass override
DC Bal encoder
bypass override
Training
sequence
enable override
Config pin
override
TxCLKIN Delay
Bypass
Reserved
Field
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
22
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Input value on GPIO2
Input value on GPIO1
Input value on GPIO0
Output value on GPIO2
Output value on GPIO1
Output value on GPIO0
0: Pin values determine setting
1: Register overrides pin values
00: No de-emphasis
01: Low
10: Medium
11: High
1: Enable NRZI, if override bit is set
1: Disable Data Valid
1: Scrambler enable, requires override bit to change
setting
1: Bypass encoder, requires override bit to change
setting
1: Enable training sequence, requires override bit to
change setting
MSB: Remote Sense enable, active low
LSB: DC balance encoder enable, active low
Requires override bit to change settings through
registers. Normally controlled by pins. See
more information.
1: Unlock reg 21’h bit 7
1: Unlock reg 21’h bit 4
1: Unlock reg 21’h bit 3
1: Unlock reg 21’h bit 2
1: Unlock reg 21’h bits 1 and 0
0: TxCLKIN delay enable
1: Bypass TxCLKIN delay
Description
Table 1
for