SI3210MPPQ1-EVB Silicon Laboratories Inc, SI3210MPPQ1-EVB Datasheet - Page 117

• Manufacturer Part Number: SI3210MPPQ1-EVB
• Description: BOARD EVAL W/SI3201 INTERFACE
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3210MPPQ1-EVB

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: Si3210
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4. Indirect Registers
Indirect registers are not directly mapped into memory
but are accessible through the IDA and IAA registers. A
write to IDA followed by a write to IAA is interpreted as a
write request to an indirect register. In this case, the
contents of IDA are written to indirect memory at the
location referenced by IAA at the next indirect register
update. A write to IAA without first writing to IDA is
interpreted as a read request from an indirect register.
In this case, the value located at IAA is written to IDA at
the next indirect register update. Indirect registers are
updated at a rate of 16 kHz. For pending indirect
register transfers, IAS (direct Register 31) will be one
until
(Register 20), can be generated upon completion of the
indirect transfer.
4.1. DTMF Decoding
All values are represented in 2s-complement format.
Note: The values of all indirect registers are undefined follow-
Addr. D15
10
11
12
0
1
2
3
4
5
6
7
8
9
ing the reset state.
serviced.
D14
In
D13
addition,
D12
Table 37. DTMF Indirect Registers Summary
an
D11
interrupt,
D10
D9
IND
Rev. 1.45
ROWREL[15:0]
PWRMIN[15:0]
COLREL[15:0]
FWDTW[15:0]
REVTW[15:0]
ROW0[15:0]
ROW1[15:0]
ROW2[15:0]
ROW3[15:0]
ROW2[15:0]
COL2[15:0]
HOTL[15:0]
COL[15:0]
D8
D7
D6
D5
Si3210/Si3211
D4
D3
D2
D1
D0
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