SI3220PPT0-EVB Silicon Laboratories Inc, SI3220PPT0-EVB Datasheet - Page 14

• Manufacturer Part Number: SI3220PPT0-EVB
• Description: BOARD EVAL W/SI3200 INTERFACE
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3220PPT0-EVB

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: Si3220
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si3220/25 Si3200/02
Table 7. Monitor ADC Characteristics
(V
14
Table 6. Linefeed Characteristics (Continued)
(V
Parameter
Loop Voltage Sense Accuracy
Loop Current Sense Accuracy
Power Alarm Threshold Accuracy
Notes:
Parameter
Resolution
Differential Nonlinearity
Integral Nonlinearity
Gain Error
DD
DD
1. Adaptive linefeed is enabled when the VOCDELTA RAM address is set to a non-zero value and is disabled when
2. R
3. Ringing amplitude is set for 93 V peak using the RINGAMP RAM address and measured at TIP-RING using no series
, V
, V
DD1
DD1
VOCDELTA is set to 0.
protection resistance.
DC,MAX
–V
– V
DD4
DD4
is the maximum dc resistance of the CPE; hence the specified total loop resistance is R
=
=
3.13 to 5.25 V, T
3.13 to 5.25 V, T
Symbol
DNL
INL
A
A
=
=
0 to 70 °C for K/F-Grade, –40 to 85 °C for B/G-Grade)
0 to 70 °C for K/F-Grade, –40 to 85 °C for B/G-Grade)
Symbol
Test Condition
Rev. 1.3
Power Threshold = 300 mW
Accuracy of boundaries for
Accuracy of boundaries for
V
each output code;
each output code;
TIP
Test Condition
I
LOOP
– V
RING
= 18 mA
= 48 V
–1.0
Min
—
—
—
±0.75
±0.6
±0.1
Typ
8
Min
—
—
—
Typ
LOOP
±2
±7
—
±0.25
Max
+1.5
±1.5
—
+ R
Max
±25
±10
±4
DC,MAX
Unit
LSB
LSB
LSB
LSB
Bits
Unit
.
%
%
%