ISL6125EVAL1Z Intersil, ISL6125EVAL1Z Datasheet - Page 6

• Manufacturer Part Number: ISL6125EVAL1Z
• Description: EVALUATION BOARD FOR ISL6125
• Manufacturer: Intersil

Specifications of ISL6125EVAL1Z

• Main Purpose: Power Management, Power Supply Supervisor/Tracker/Sequencer
• Embedded: No
• Utilized Ic / Part: ISL6125
• Primary Attributes: 4 Channel Power Supply Sequencer
• Secondary Attributes: Undervoltage Protection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Absolute Maximum Ratings
V
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
ISL6125 LOGIC OUT. . . . . . . . . . . . . . . . . . . . . -0.3V to V
UVLO, ENABLE, ENABLE, SYSRST . . . . . . . . -0.3V to V
RESET, DLY_ON, DLYOFF . . . . . . . . . . . . . . . . -0.3V to V
Operating Conditions
V
Temperature Range (T
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
Electrical Specifications
UVLO
Falling Undervoltage Lockout Threshold
Undervoltage Lockout Threshold Tempco
Undervoltage Lockout Hysteresis
Undervoltage Lockout Threshold Range
Undervoltage Lockout Delay
Transient Filter Duration
DELAY ON/OFF
Delay Charging Current
Delay Charging Current Range
Delay Charging Current Temperature
Coefficient
Delay Threshold Voltage
Delay Threshold Voltage Temperature
Coefficient
ENABLE/ENABLE, RESET AND SYSRST I/O
ENABLE Threshold
ENABLE Threshold
ENABLE/ENABLE Hysteresis
ENABLE/ENABLE Lockout Delay
ENABLE/ENABLE Input Capacitance
RESET Pull-up Voltage
RESET Pull-Down Current
RESET Delay after GATE High
3. θ
4. For θ
5. All voltages are relative to GND, unless otherwise specified.
DD
DD
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . +1.5V to +5.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
PARAMETER
ISL6123, ISL6124, ISL6125, ISL6126, ISL6127, ISL6128, ISL6130
A
) . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
6
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
V
DD
= 1.5V to +5V, T
TC_DLY_ichg
TC_DLY_Vth
DLY_ichg_r
V
TC
RUVLOvth
TUVLOdel
V
SYMBOL
V
t
DLY_ichg
DLY_Vth
delEN_LO
ENh -
I
I
I
T
Vpu_rst
UVLOhys
Cin_en
UVLOvth
RSTpd1
RSTpd3
RSTpd5
V
V
RSTdel
UVLOvth
t
FIL
ENh
ENh
V
ENl
A
DD
DD
DD
= T
DD
+ 0.3V
+ 0.3V
+ 0.3V
J
+6V
T
Max V
ENABLE satisfied
V
V
DLY_ichg(max) - DLY_ichg(min)
Measured at V
UVLO satisfied
V
V
V
GATE = V
= -40°C to +85°C, unless otherwise specified. Parameters with MIN and/or MAX
J
DD
DLY
DD
DD
DD
= +25°C
, UVLO, ENABLE glitch filter
= 1.5V, RST = 0.1V
= 3.3V, RST = 0.1V
= 5V, RST = 0.1V
= 0V
TEST CONDITIONS
UVLOvth
DD
+5V
Thermal Information
Thermal Resistance (Typical, Notes 3, 4)
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . +125°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
- Min V
DD
24 Ld 4x4 QFN Package . . . . . . . . . . .
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
= 1.5V
UVLOvth
1.238
0.92
MIN
619
0.5 V
1.266
TYP
0.08
V
633
160
0.2
0.2
1.2
0.2
40
10
10
30
10
13
17
DD
7
1
5
5
DD
θ
JA
(°C/W)
48
1.294
MAX
1.08
647
October 15, 2008
θ
JC
FN9005.10
mV/°C
nV/°C
nA/°C
UNIT
(°C/W)
mV
mV
mV
mA
mA
mA
9
ms
ms
ms
µA
µA
pF
µs
V
V
V
V
V