LTC1502IMS8-3.3 Linear Technology, LTC1502IMS8-3.3 Datasheet - Page 5

IC DC/DC CONV 3.3V CHRGPMP 8MSOP

LTC1502IMS8-3.3

Manufacturer Part Number
LTC1502IMS8-3.3
Description
IC DC/DC CONV 3.3V CHRGPMP 8MSOP
Manufacturer
Linear Technology
Type
Switched Capacitor (Charge Pump)r
Datasheet

Specifications of LTC1502IMS8-3.3

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
3.3V
Current - Output
10mA
Frequency - Switching
500kHz
Voltage - Input
0.9 ~ 1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1502IMS8-3.3
Manufacturer:
LT
Quantity:
10 000
APPLICATIONS
Regulator Operation
The LTC1502-3.3 uses a quadrupler charge pump DC/DC
converter to produce a boosted output voltage. The
quadrupler charge pump consists of two voltage doubler
charge pumps (CP1 and CP2 on the Block Diagram)
cascaded in series. CP1 doubles the input voltage V
the CP1 output voltage is stored on external capacitor C2.
The C2 pin also serves as the input for doubler CP2 whose
output is stored on the output capacitor C
doubler is controlled by a two-phase clock which is
generated in the Timing Control circuit. On phase one of
the clock, the flying capacitors C1 and C3 are charged to
their respective input voltages. On phase two each charged
flying capacitor is stacked on top of the input voltage and
discharged through an internal switch onto its respective
output. This sequence of charging and discharging the
CP1 and CP2 flying capacitors continues at the free
running oscillator frequency (500kHz typ) until the output
is in regulation.
Regulation is achieved by comparing the divided down
output voltage to a fixed voltage reference. The charge
pump clocks are disabled when the output voltage is
above the desired regulation point set by COMP1. When
the output has dropped below the lower trip point of
COMP1, the charge pump clocks are turned back on until
V
Enhanced Start-Up
Enhanced start-up capability is provided by the COMP2
circuitry. COMP2 compares the divided down C2 voltage
to the input voltage V
output charge pump CP2 whenever the divided C2 voltage
TEST CIRCUIT
OUT
is boosted back into regulation.
U
IN
. The COMP2 output disables the
INFORMATION
U
CLOSED FOR
SHUTDOWN
SWITCH
W
100
10 F
100pF
OUT
U
1 F
. Each
IN
1
2
3
4
and
C2
C1
C1
GND
LTC1502-3.3
+
/SHDN
is lower than V
high impedance state until the voltage on C2 has been
raised above V
proper start-up). This allows a higher internal gate drive
voltage to be generated (from the C2 pin) before the output
(V
CP2 to be turned ON and OFF while C
prevent a lockup condition if C2 droops too low during
start-up. By the time the output nears the regulation point,
the C2 voltage is well above the lower trip point of COMP2
and CP2 will remain enabled. This method of disabling the
output charge pump while an internal boosted gate drive
supply is developed allows the part to start up at low
voltages with a larger output current load than would
otherwise be possible.
Shutdown
Shutdown is implemented using an external pull-down
device on the C1
pull-down device is an open-drain FET with resistive cur-
rent limiting (see Figure 1). The pull-down device must sink
up to 300 A and pull down below 0.2V to ensure proper
shutdown operation, however, the actual series resistance
is not critical. The pull-down device must also go into a Hi-
Z state for the LTC1502-3.3 to become active.
The timing control circuitry forces the CP1 switches into
a high impedance state every 16 clock cycles. The Hi-Z
duration is equal to one clock cycle. At the end of the
Hi-Z time interval, the voltage on the C1
sampled. If the C1
low state, the part will go into shutdown mode. When the
pull-down device is disabled, an internal pull-up current
V
C3
C3
OUT
V
OUT
IN
+
8
7
6
5
) is connected to a load. Hysteresis in COMP2 forces
1 F
10 F
IN
IN
. The CP2 output is thereby forced into a
/SHDN pin. The recommended external
(the C2 pin should not be loaded for
V
10 F
/SHDN pin has been pulled to a logic
IN
1502-3.3 TC
I
OUT
LTC1502-3.3
OUT
is charging up to
/SHDN pin is
5

Related parts for LTC1502IMS8-3.3