LT1317CS8 Linear Technology, LT1317CS8 Datasheet - Page 6

• Manufacturer Part Number: LT1317CS8
• Description: IC BOOST ADJ .5A 8SOIC
• Manufacturer: Linear Technology
• Type: Step-Up (Boost)r

Specifications of LT1317CS8

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.24 ~ 30 V
• Current - Output: 500mA
• Frequency - Switching: 620kHz
• Voltage - Input: 1.5 ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

DC COUPLED
Note: For load regulation pictures, double lines are due to
output capacitor ESR.
PIN
LT1317/LT1317B
TYPICAL PERFOR A CE CHARACTERISTICS
DC COUPLED
V
nect a series RC network from this pin to ground. Typical
values for compensation are a 33k/3.3nF combination. A
100pF capacitor from the V
improves noise immunity. Minimize trace area at V
FB (Pin 2): Feedback Pin. Reference voltage is 1.24V.
Connect resistor divider tap here. Minimize trace area at
FB. Set V
SHDN (Pin 3): Shutdown. Pull this pin low for shutdown
mode (only the low-battery detector remains active).
Leave this pin floating or tie to a voltage between 1.4V and
6V to enable the device. SHDN pin is logic level and need
only meet the logic specification (1.4V for high, 0.4V for
low).
6
C
50mV/DIV
50mV/DIV
U
OFFSET
(Pin 1): Compensation Pin for Error Amplifier. Con-
ADDED
OFFSET
ADDED
V
V
OUT
OUT
FUNCTIONS
Load Regulation (LT1317)
V
V
Load Regulation (LT1317)
V
V
OUT
IN
OUT
IN
OUT
= 1.5V
U
= 1.5V
= 5V
= 3.3V
according to: V
I
I
LOAD
LOAD
U
25mA/DIV
25mA/DIV
C
W
pin to ground is optional and
OUT
= 1.24V(1 + R1/R2).
U
1317 TPC19
1317 TPC22
DC COUPLED
DC COUPLED
50mV/DIV
50mV/DIV
OFFSET
ADDED
OFFSET
ADDED
V
V
OUT
OUT
Load Regulation (LT1317)
V
V
Load Regulation (LT1317)
V
V
IN
OUT
IN
OUT
= 2V
= 2V
= 5V
= 3.3V
C
.
I
I
LOAD
LOAD
GND (Pin 4): Ground. Connect directly to local ground
plane.
SW (Pin 5): Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to keep EMI down.
V
pin.
LBI (Pin 7): Low-Battery Detector Input. 200mV refer-
ence. Voltage on LBI must stay between ground and
700mV. Low-battery detector remains active in shutdown
mode.
LBO (Pin 8): Low-Battery Detector Output. Open collec-
tor, can sink 10 A. A 1M pull-up is recommended.
25mA/DIV
50mA/DIV
IN
(Pin 6): Supply Pin. Must be bypassed close to the
1317 TPC20
1317 TPC23
DC COUPLED
DC COUPLED
50mV/DIV
50mV/DIV
OFFSET
ADDED
OFFSET
ADDED
V
V
OUT
OUT
Load Regulation (LT1317)
V
V
Load Regulation (LT1317)
V
V
IN
OUT
IN
OUT
= 2.5V
= 2.5V
= 5V
= 3.3V
I
I
LOAD
LOAD
50mA/DIV
50mA/DIV
1317 TPC21
1317 TPC24