LTC1503CMS8-1.8 Linear Technology, LTC1503CMS8-1.8 Datasheet - Page 8

• Manufacturer Part Number: LTC1503CMS8-1.8
• Description: IC BUCK/SW CAP 1.8V .1A 8MSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck), Switched Capacitor (Charge Pump)r

Specifications of LTC1503CMS8-1.8

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.8V
• Current - Output: 100mA
• Frequency - Switching: 600kHz
• Voltage - Input: 2.4 ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
LTC1503-1.8/LTC1503-2
approximately 1.9V. Since the ramp rate on the SHDN/SS
pin controls the ramp rate on V
current can be controlled through selection of C
C
in a 4ms ramp time from 0.35V to 1.9V on the pin. If C
is 10 F, the 4ms V
C
8
OUT
OUT
ON OFF
. For example, a 4.7nF capacitor on SHDN/SS results
2V/DIV
1V/DIV
2V/DIV
1V/DIV
charge current of only 5mA (see Figure 2c).
V
V
V
V
CTRL
CTRL
OUT
OUT
V
LTC1503-2
C
C
R
LTC1503-2
C
C
R
CTRL
Figure 2. Shutdown/Soft-Start Operation
SS
OUT
SS
OUT
LOAD
LOAD
= 0nF
= 4.7nF
= 10 F
= 10 F
= 50
= 50
U
REF
ramp time results in an average
C
2ms/DIV
2ms/DIV
U
SS
5
(a)
(b)
(c)
SHDN/SS
LTC1503-X
OUT
W
V
OUT
, the average inrush
1
1503-1.8/2 F02a
1503-1.8/2 F02b
1503-1.8/2 F02b
U
R
LOAD
SS
and
OUT
Capacitor Selection
For best performance, it is recommended that low ESR
capacitors be used for C
ripple. If the ESR of the output capacitor is too high
(> 0.5 ), both efficiency and output load regulation may
be degraded. The C
ceramic or tantalum and should be 10 F or greater. If the
input source impedance is very low (< 0.5 ), C
be needed. Ceramic capacitors are recommended for the
flying caps C1 and C2 with values of 0.47 F to 2.2 F.
Smaller values may be used in low output current applica-
tions (e.g., I
the same capacitance value for both C1 and C2.
Output Ripple
Normal LTC1503-X operation produces voltage ripple on
the V
to regulate. Low frequency ripple exists due to the hyster-
esis in the sense comparator and propagation delays in the
charge pump enable/disable circuits. High frequency ripple
is also present mainly from the ESR (equivalent series
resistance) in the output capacitor. Typical output ripple
(V
with a low ESR 10 F output capacitor.
The magnitude of ripple voltage depends on several fac-
tors. High input voltages increase the output ripple since
more charge is delivered to C
output current load and/or a small output capacitor (< 10 F)
results in higher ripple due to higher output voltage dV/dt.
High ESR capacitors (ESR > 0.5 ) on the output pin cause
high frequency voltage spikes on V
cycle.
There are several ways to reduce the output voltage ripple
(see Figure 3). A larger C
will reduce both the low and high frequency ripple due to
the lower C
lower ESR typically found with higher value (larger case
size) capacitors. A low ESR ceramic output capacitor will
minimize the high frequency ripple, but will not reduce the
low frequency ripple unless a high capacitance value is
chosen. A reasonable compromise is to use a 10 F to 22 F
tantalum capacitor in parallel with a 1 F to 3.3 F ceramic
IN
= 3.6V) under maximum load is 25mV peak-to-peak
OUT
pin. Output voltage ripple is required for the parts
OUT
OUT
charging and discharging dV/dt and the
< 10mA). For best performance choose
IN
and C
IN
OUT
OUT
and C
OUT
capacitor (22 F or greater)
capacitors should be either
per charging cycle. Large
OUT
OUT
to reduce noise and
with every clock
IN
may not