SC174MLTRT Semtech, SC174MLTRT Datasheet - Page 17

• Manufacturer Part Number: SC174MLTRT
• Description: IC BUCK SYNC ADJ 4A MLPD-10
• Manufacturer: Semtech
• Series: EcoSpeed™r
• Type: Step-Down (Buck)r

Specifications of SC174MLTRT

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.75 ~ 5.23 V
• Current - Output: 4A
• Frequency - Switching: 200kHz ~ 1MHz
• Voltage - Input: 3 ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MLPD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Other names: SC174MLTR

Applications Information (continued)
Rate of change of load current is
I
Note that C
pared to 353µF based upon a worst-case load release. To
meet the two design criteria of minimum 79µF and maxi-
mum 78mΩ ESR, select two capacitors rated at 47µF and
15mΩ ESR or less.
It is recommended that an additional small capacitor be
placed in parallel with C
cy switching noise.
Stability Considerations
Unstable operation is possible with adaptive on-time
controllers, and usually takes the form of double-pulsing
or ESR loop instability.
Double-pulsing occurs due to switching noise seen at
the FB input or because the FB ripple voltage is too low.
This causes the FB comparator to trigger prematurely af-
ter the minimum off-time has expired. In extreme cases
the noise can cause three or more successive on-times.
Double-pulsing will result in higher ripple voltage at the
output, but in most applications it will not affect opera-
tion. This form of instability can usually be avoided by
providing the FB pin with a smooth, clean ripple signal
that is at least 10mVp-p, which may dictate the need to
© 2010 Semtech Corporation
MAX
= maximum load release = 4A
C
OUT
C
OUT
OUT
=
I
is much smaller in this example, 79µF com-
LPK
4.26A
=
=
I
4A
LPK
dI
×
+
LOAD
dt
×
C
2
2
OUT
1
L
OUT
m
×
H
×
0.511A
in order to filter high frequen-
=
2
×
2
V
=
I
×
LPK
0.6A
OUT
4.26A
×
79
1
(
1V
(1.05V
m
V
m
s
PK
=
-
F
4.26A
dI
-
I
-
MAX
LOAD
V
0.6A
OUT
-
4A
1V)
×
)
dt
×
1
m
s
increase the ESR of the output capacitors. It is also im-
perative to provide a proper PCB layout as discussed in
the Layout Guidelines section.
Another way to eliminate doubling-pulsing is to add a
small (~ 10pF) capacitor across the upper feedback resis-
tor, as shown in Figure 8. This capacitor should be left
unpopulated unless it can be confirmed that double-
pulsing exists. Adding the C
more ripple into FB to help eliminate the problem. An
optional connection on the PCB should be available for
this capacitor.
ESR loop instability is caused by insufficient ESR. The
details of this stability issue are discussed in the ESR Re-
quirements section. The best method for checking sta-
bility is to apply a zero-to-full load transient and observe
the output voltage ripple envelope for overshoot and
ringing. Ringing for more than one cycle after the initial
step is an indication that the ESR should be increased.
One simple way to solve this problem is to add trace re-
sistance in the high current output path. A side effect of
adding trace resistance is a decrease in load regulation.
ESR Requirements
A minimum ESR is required for two reasons. One reason
is to generate enough output ripple voltage to provide
10mVp-p at the FB pin (after the resistor divider) to avoid
double-pulsing.
The second reason is to prevent instability due to insuf-
ficient ESR. The on-time control regulates the valley of
the output ripple voltage. This ripple voltage is the sum
of the two voltages. One is the ripple generated by the
ESR, the other is the ripple due to capacitive charging
Figure 8 — Capacitor Coupling to FB Pin
V
OUT
C
R1
TOP
TOP
R2
capacitor will couple
To FB pin
17