MAX1544ETL+T Maxim Integrated Products, MAX1544ETL+T Datasheet - Page 8

• Manufacturer Part Number: MAX1544ETL+T
• Description: IC QUICK-PWM DUAL-PHASE 40-TQFN
• Manufacturer: Maxim Integrated Products
• Series: Quick-PWM™r

Specifications of MAX1544ETL+T

• Applications: Controller, AMD Hammer
• Voltage - Input: 2 ~ 28 V
• Number Of Outputs: 1
• Voltage - Output: 0.68 ~ 1.55 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Output Voltage: 0.675 V to 1.55 V
• Output Current: 40 A
• Input Voltage: 4 V to 28 V
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = 15V, V
1.3V, OFS = SUS = GNDS = D0–D4 = GND; T
Dual-Phase, Quick-PWM Controller for
AMD Hammer CPU Core Power Supplies
8
Note 2: DC output accuracy specifications refer to the trip level of the error amplifier. When pulse skipping, the output slightly rises
Note 3: On-time and minimum off-time specifications are measured from 50% to 50% at the DHM and DHS pins, with LX_ forced to
Note 4: The output fault-blanking time is measured from the time when FB reaches the regulation voltage set by the DAC code.
Note 5: Specifications to T
DL_ Gate-Driver On-Resistance
VOLTAGE-POSITIONING AMPLIFIER
Input Offset Voltage
Common-Mode Input Voltage
Range
Output Voltage Swing
LOGIC AND I/O
SHDN Input High Voltage
SHDN Input Low Voltage
Three-Level Input Logic Levels
D0–D4 Logic Input High Voltage
D0–D4 Logic Input Low Voltage
OVP Input High Voltage
OVP Input Low Voltage
Four-Level Input Logic Levels
_______________________________________________________________________________________
(<0.5%) when transitioning from continuous conduction to no load.
GND, BST_ forced to 5V, and a 500pF capacitor from DH_ to LX_ to simulate external MOSFET gate capacitance. Actual in-
circuit times may be different due to MOSFET switching speeds.
During normal operation (SUS = GND), the regulation voltage is set by the VID DAC inputs (D0–D4). During suspend mode
(SUS = REF or high), the regulation voltage is set by the suspend DAC inputs (S0–S1).
PARAMETER
A
= -40°C and +100°C are guaranteed by design and are not production tested.
CC
= V
SYMBOL
R
DD
ON(DL)
V
V
V
V
CM
OS
= V
IH
IL
SHDN
A
= -40°C to +100°C, unless otherwise specified.) (Note 5)
High state (pullup)
Low start (pulldown)
Guaranteed by CMRR test
|V
R
SUS, SKIP
TON, S0–S1
= V
L
OAIN+
= 1kΩ to V
TON
- V
= V
OAIN-
SKIP
CC
CONDITIONS
| ≥ 10mV,
/2
= V
S0
= V
High
REF
Low
High
Open
REF
Low
S1
V
V
= V
CC
FBL
OVP
- V
FBH
= 5V, V
FB
V
MIN
3.15
1.65
-2.0
0.8
2.7
1.2
1.6
2.4
CC
0.4
= V
0
-
CMP
= V
CMN
= V
MAX
+2.0
3.85
2.35
300
200
4.5
2.5
0.4
2.3
0.8
0.8
0.8
0.4
2
CSP
= V
UNITS
mV
mV
CSN
Ω
V
V
V
V
V
V
V
V
V
=