ISL6523CBZ-T Intersil, ISL6523CBZ-T Datasheet - Page 9

• Manufacturer Part Number: ISL6523CBZ-T
• Description: IC CTRLR VRM8.5 PWM DUAL 28-SOIC
• Manufacturer: Intersil

Specifications of ISL6523CBZ-T

• Applications: Controller, Intel VRM8.5
• Voltage - Input: 5 ~ 15 V
• Number Of Outputs: 4
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
OUT1 Voltage Program
The output voltage of the PWM1 converter is programmed to
discrete levels between 1.050V and 1.825V. This output
(OUT1) is designed to supply the core voltage of Intel’s
advanced microprocessors. The voltage identification (VID)
pins program an internal voltage reference (DACOUT) with a
TTL-compatible 5-bit digital-to-analog converter (DAC). The
level of DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the different
combinations of connections on the VID pins. The VID pins
can be left open for a logic 1 input, since they are internally
pulled to the VAUX pin through 5kΩ resistors. Changing the
VID inputs during operation is not recommended and could
toggle the PGOOD signal and exercise the overvoltage
protection. The output voltage program is Intel VRM8.5
compatible.
3. Determine I
VID3
i
OC
D
CURRENT
where ∆I is the output inductor ripple current.
0
0
0
0
0
0
0
0
0
0
0
1
1
×
OVER-
OVERCURRENT TRIP:
PWM
r
TABLE 1. OUT1 OUTPUT VOLTAGE PROGRAM
DS ON
(
V
FIGURE 8. OVERCURRENT DETECTION
+
DS
-
VID2
)
1
1
1
0
0
0
0
0
0
0
0
1
1
>
>
PEAK
V
I
CONTROL
OCSET
SET
GATE
PIN NAME
VID1
for I
I
OCSET
DRIVE
200µA
0
0
0
1
1
1
1
0
0
0
0
1
1
×
OCSET
R
PEAK
OCSET
9
VID0
VCC
> I
0
0
0
1
1
0
0
1
1
0
0
1
1
OUT(MAX)
UGATE
R
V
PHASE
V OCSET
OCSET
V
PHASE
SET
VID25
+
0
0
1
0
1
0
1
0
1
0
1
0
1
+ (∆I) / 2,
=
=
V
V
IN
V IN V SET
i
D
V
IN
+
NOMINAL
VOLTAGE
= +5V
DACOUT
DS
–
–
1.050
1.050
1.075
1.100
1.125
1.150
1.175
1.200
1.225
1.250
1.275
1.300
1.325
V
DS
ISL6523
NOTE: 0 = connected to GND, 1 = open or connected to 3.3V
through pull-up resistors
Application Guidelines
Soft-Start Interval
Initially, the soft-start function clamps the error amplifier’s output
of the PWM converters. This generates PHASE pulses of
increasing width that charge the output capacitor(s). The
resulting output voltages start-up as shown in Figure 5.
The soft-start function controls the output voltage rate of rise
to limit the current surge at start-up. The soft-start interval
and the surge current are programmed by the soft-start
capacitor, C
increases the peak surge current. Using the recommended
0.1µF soft start capacitors ensure all output voltages ramp
up to their set values in a quick and controlled fashion, while
meeting the system timing requirements.
Shutdown
Neither PWM output switches until the soft-start voltage
(V
reference on each linear’s amplifier is clamped to the soft-
start voltage. Holding the SS24 pin low (with an open drain
or open collector signal) turns off regulators 1, 2 and 3.
Regulator 4 (MCH) will simply drop its output to the
intermediate soft-start level. This output is not allowed to
violate the 2V maximum potential gap to the ATX 3.3V
output.
TABLE 1. OUT1 OUTPUT VOLTAGE PROGRAM (Continued)
SS
VID3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
) exceeds the oscillator’s valley voltage. Additionally, the
SS
VID2
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
. Programming a faster soft-start interval
PIN NAME
VID1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
VID0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID25
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
NOMINAL
VOLTAGE
DACOUT
1.350
1.375
1.400
1.425
1.450
1.475
1.500
1.525
1.550
1.575
1.600
1.625
1.650
1.675
1.700
1.725
1.750
1.775
1.800
1.825