LP2997M/NOPB National Semiconductor, LP2997M/NOPB Datasheet - Page 7

• Manufacturer Part Number: LP2997M/NOPB
• Description: IC DDR-II TERMINATION REG 8-SOIC
• Manufacturer: National Semiconductor

Specifications of LP2997M/NOPB

• Applications: Converter, DDR2
• Voltage - Input: 2.2 ~ 5.5 V
• Number Of Outputs: 1
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Primary Input Voltage: 1.8V
• No. Of Outputs: 1
• No. Of Pins: 8
• Output Current: 500mA
• Operating Temperature Range: 0°C To +125°C
• Msl: MSL 1 - Unlimited
• Input Voltage Primary Max: 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Other names: *LP2997M; *LP2997M/NOPB; LP2997M

Description
The LP2997 is a linear bus termination regulator designed to
meet the JEDEC requirements of SSTL-18. The output, V
is capable of sinking and sourcing current while regulating the
output voltage equal to VDDQ / 2. The output stage has been
designed to maintain excellent load regulation while prevent-
ing shoot through. The LP2997 also incorporates two distinct
power rails that separates the analog circuitry from the power
output stage. This allows a split rail approach to be utilized to
decrease internal power dissipation. It also permits the
LP2997 to provide a termination solution for the next gener-
ation of DDR-SDRAM memory (DDRII).
Pin Descriptions
AVIN AND PVIN
AVIN and PVIN are the input supply pins for the LP2997. AVIN
is used to supply all the internal control circuitry. PVIN, how-
ever, is used exclusively to provide the rail voltage for the
output stage used to create V
bility to work off separate supplies, under the condition that
AVIN is always greater than or equal to PVIN. For SSTL-18
applications, it is recommended to connect PVIN to the 1.8V
rail used for the memory core and AVIN to a rail within its
operating range of 2.2V to 5.5V (typically a 2.5V supply). PVIN
should always be used with either a 1.8V or 2.5V rail. This
prevents the thermal limit from tripping because of excessive
internal power dissipation. If the junction temperature ex-
ceeds the thermal shutdown than the part will enter a shut-
down state identical to the manual shutdown where V
stated and V
be used but it will reduce the maximum output current, there-
fore it is not recommended for most termination schemes.
VDDQ
VDDQ is the input used to create the internal reference volt-
age for regulating V
from a resistor divider of two internal 50kΩ resistors. This
guarantees that V
implementation of VDDQ is as a remote sense. This can be
achieved by connecting VDDQ directly to the 1.8V rail at the
DIMM instead of PVIN. This ensures that the reference volt-
age tracks the DDR memory rails precisely without a large
voltage drop from the power lines. For SSTL-18 applications
VDDQ will be a 1.8V signal, which will create a 0.9V termina-
tion voltage at V
exact values of V
V
The purpose of the sense pin is to provide improved remote
load regulation. In most motherboard applications the termi-
nation resistors will connect to V
voltage was regulated only at the output of the LP2997 then
the long trace will cause a significant IR drop resulting in a
termination voltage lower at one end of the bus than the other.
The V
connecting it to the middle of the bus. This will provide a better
distribution across the entire termination bus. If remote load
regulation is not used then the V
nected to V
is implemented in close proximity to the memory. Noise pick-
up in the V
regulation of V
to the V
and preventing errors.
SENSE
SENSE
SENSE
TT
pin can be used to improve this performance, by
REF
SENSE
. Care should be taken when a long V
TT
pin can help filter any high frequency signals
. A small 0.1uF ceramic capacitor placed next
remains active. A lower rail such as 1.5V can
TT
TT
TT
trace can cause problems with precise
(See Electrical Characteristics Table for
will track VDDQ / 2 precisely. The optimal
over temperature).
TT
. The reference voltage is generated
TT
TT
. These pins have the capa-
SENSE
in a long plane. If the output
pin must still be con-
SENSE
TT
trace
is tri-
TT
7
SHUTDOWN
The LP2997 contains an active low shutdown pin that can be
used for suspend to RAM functionality. In this condition the
V
providing a constant reference signal for the memory and
chipset. During shutdown V
ages that exceed PVIN. With the shutdown pin asserted low
the quiescent current of the LP2997 will drop, however, VD-
DQ will always maintain its constant impedance of 100kΩ for
generating the internal reference. Therefore, to calculate the
total power loss in shutdown both currents need to be con-
sidered. For more information refer to the Thermal Dissipation
section. The shutdown pin also has an internal pull-up current;
therefore, to turn the part on the shutdown pin can either be
connected to AVIN or left open
V
V
voltage VDDQ / 2. This output should be used to provide the
reference voltage for the Northbridge chipset and memory.
Since these inputs are typically an extremely high impedance,
there should be little current drawn from V
performance, an output bypass capacitor can be used, locat-
ed close to the pin, to help with noise. A ceramic capacitor in
the range of 0.1 µF to 0.01 µF is recommended. This output
remains active during the shutdown state and thermal shut-
down events for the suspend to RAM functionality.
V
V
resistors. It is capable of sinking and sourcing current while
regulating the output precisely to VDDQ / 2. The LP2997 is
designed to handle continuous currents of up to +/- 0.5A with
excellent load regulation. If a transient is expected to last
above the maximum continuous current rating for a significant
amount of time, then the bulk output capacitor should be sized
large enough to prevent an excessive voltage drop. If the
LP2997 is to operate in elevated temperatures for long dura-
tions care should be taken to ensure that the maximum junc-
tion temperature is not exceeded. Proper thermal de-rating
should always be used. (Please refer to the Thermal Dissi-
pation section) If the junction temperature exceeds the ther-
mal shutdown point than V
below the temperature hysteresis trip-point
Component Selections
INPUT CAPACITOR
The LP2997 does not require a capacitor for input stability,
but it is recommended for improved performance during large
load transients to prevent the input rail from dropping. The
input capacitor should be located as close as possible to the
PVIN pin. Several recommendations exist dependent on the
application required. A typical value recommended for AL
electrolytic capacitors is 22 µF. Ceramic capacitors can also
be used. A value in the range of 10 µF with X5R or better
would be an ideal choice. The input capacitance can be re-
duced if the LP2997 is placed close to the bulk capacitance
from the output of the 1.8V DC-DC converter. For the AVIN
pin, a small 0.1uF ceramic capacitor is sufficient to prevent
excessive noise from coupling into the device.
OUTPUT CAPACITOR
The LP2997 has been designed to be insensitive of output
capacitor size or ESR (Equivalent Series Resistance). This
allows the flexibility to use any capacitor desired. The choice
for output capacitor will be determined solely on the applica-
TT
REF
REF
TT
TT
output will tri-state while the V
is the regulated output that is used to terminate the bus
provides the buffered output of the internal reference
TT
TT
will tri-state until the part returns
should not be exposed to volt-
REF
output remains active
REF
. For improved
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