UC3845BVDG ON Semiconductor, UC3845BVDG Datasheet - Page 10

• Manufacturer Part Number: UC3845BVDG
• Description: IC CTRLR CURRENT MODE HP 14SOIC
• Manufacturer: ON Semiconductor

Specifications of UC3845BVDG

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 275kHz
• Duty Cycle: 50%
• Voltage - Supply: 8.2 V ~ 25 V
• Buck: No
• Boost: Yes
• Flyback: Yes
• Inverting: Yes
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Frequency-max: 275kHz
• Duty Cycle (max): 48 %
• Output Voltage: 4.9 V to 5.1 V
• Output Current: 1000 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 500 KHz
• Operating Supply Voltage: 30 V
• Maximum Operating Temperature: + 70 C
• Fall Time: 50 ns
• Minimum Operating Temperature: 0 C
• Rise Time: 50 ns
• Synchronous Pin: No
• Topology: Boost, Flyback
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: UC3845BVDGOS

V
R
R
t SoftStart + * In 1 *
Clamp
2
1
R
R
8(14)
2
1
V
4(7)
2(3)
1(1)
Clamp
8(14)
4(7)
2(3)
1(1)
≈
Figure 20. Adjustable Reduction of Clamp Level
MPSA63
Figure 22. Adjustable Buffered Reduction of
≈
R 2
R 1
EA
1.67
R
R
) 1
EA
R 2
R 1
R
R
+
1.67
Osc
) 1
Bias
+
1.0 mA
Clamp Level with Soft−Start
Osc
+ 0.33x10
Bias
1.0 mA
2R
3V Clamp
R
2R
V C
R
Where: 0 ≤ V
V
5(9)
-3
Clamp
1.0V
-
+
V
1.0V
5(9)
Clamp
5.0V Ref
-
R 1 ) R 2
+
C
R 1 R 2
5.0V Ref
R 1 ) R 2
R 1 R 2
Comp/Latch
Clamp
Comp/Latch
R
S
T
Q
S
R
≤ 1.0 V
T
Where: 0 ≤ V
I pk(max) [
Q
I pk(max) [
+
-
+
-
7(12)
V
7(12)
CC
Clamp
V
7(11)
6(10)
5(8)
3(5)
V Clamp
CC
R S
7(11)
6(10)
5(8)
3(5)
http://onsemi.com
≤ 1.0 V
V Clamp
R S
Q1
R
V
in
S
V
Q1
R
10
in
S
-
+
Virtually lossless current sensing can be achieved with the implementation
of a SENSEFETt power switch. For proper operation during over-current
conditions, a reduction of the I
Refer to Figures 20 and 22.
5.0V Ref
Figure 23. Current Sensing Power MOSFET
C
Control Circuitry Ground:
S
R
Comp/Latch
T
Q
1.0M
8(14)
4(7)
2(3)
1(1)
t
To Pin (9)
Soft-Start
Figure 21. Soft−Start Circuit
+
-
≈ 3600C in mF
(12)
pk(max)
EA
V
R
R
(11)
(10)
(8)
(5)
CC
+
clamp level must be implemented.
Osc
G
1.0mA
Bias
1/4 W
R
S
D SENSEFET
M
2R
V
R
in
Then : V Pin 5 [ 0.075 I pk
V Pin 5 [
If: SENSEFET = MTP10N10M
K
To Input Source
Power Ground:
S
5(9)
Return
1.0V
-
+
5.0V Ref
R
r DM(on) ) R S
R S I pk r DS(on)
S
= 200
S
R
T
Q