NCP1562BDBR2G ON Semiconductor, NCP1562BDBR2G Datasheet - Page 18

• Manufacturer Part Number: NCP1562BDBR2G
• Description: IC CLAMP/RESET PWM CTLR 16-TSSOP
• Manufacturer: ON Semiconductor

Specifications of NCP1562BDBR2G

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1MHz
• Duty Cycle: 85%
• Voltage - Supply: 23.2 V ~ 100 V
• Buck: No
• Boost: Yes
• Flyback: Yes
• Inverting: Yes
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Frequency-max: 1MHz
• Topology: Flyback, Forward, Half-Bridge
• Output Voltage: 20 V
• Output Current: 2000 mA, 1000 mA
• Switching Frequency: 1000 KHz
• Duty Cycle (max): 85 %
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Fall Time: 10 ns
• Mounting Style: SMD/SMT
• Rise Time: 26 ns
• Synchronous Pin: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1562BDBR2G; NCP1562BDBR2GOSTR

V
an independent 12 V supply. If operating from an
independent supply, the V
connected together. The independent supply should
maintain V
Latch will not be SET and the outputs will remain OFF after
a fault condition is removed.
is recommended to place a diode between C
auxiliary supply as shown in Figure 41. This allows the
NCP1562 to charge C
regulator from sourcing current into the auxiliary supply.
in the self- - bias or DSS mode. During the converter
powerup, C
greater than V
supply voltage is building up. Otherwise, V
collapse and the controller will turn OFF. Also, the V
discharge time (from 10.3 V to 7.0 V) must be greater that
the soft- - start charge period to assure the converter turns
AUX(on)
The startup regulator is disabled by biasing V
The startup circuit sources current into the V
C
AUX
V
Figure 41. Recommended V
in
provides power to the controller while operating
. This feature allows the NCP1562 to operate from
AUX
AUX
Disable
V
AUX(off2)
V
I
AUX(off1)
start
AUX(on)
above V
V
must be sized such that a V
V
V
V
UVOV
V
V
inhibit
SS
AUX
REF
out1
AUX
is maintained while the auxiliary
AUX(on)
V
in
I
AUX
AUX
while preventing the startup
and V
. Otherwise, the Output
AUX
AUX
C
Auxiliary Supply or
Independent Supply
Configuration
AUX
pins should be
Figure 40. Startup Circuit Waveforms
I
supply
AUX
AUX
AUX
AUX
AUX
and the
voltage
http://onsemi.com
above
pin. It
AUX
will
18
ON. The IC bias current, gate charge load on the outputs,
and the 5.0 V reference load must be considered to
correctly size C
external gate charge is calculated using Equation 1.
where, f is the operating frequency and Q
charge.
prevents excessive power dissipation if the V
accidentally shorted. While V
startup circuit is disabled and a current source (I
charges V
V
Therefore it is imperative that V
resistor divider, etc.) with more than 50 mA while V
below 1.2 V. Otherwise, V
greater than 50 mA is present, a resistor can be placed
between the V
1.2 V.
100 V. If the device operates in the DSS mode, power
dissipation should be controlled to avoid exceeding the
maximum power dissipation of the controller. If dissipation
on the controller is excessive, a resistor can be placed in
series with the V
on the controller and transfer it to the series resistor.
Line Under/Overvoltage Detector
overvoltage (OV) detection using a novel architecture
AUX
An internal supervisory circuit monitors V
The startup circuit is rated at a maximum voltage of
The same pin is used for both line undervoltage (UV) and
reaches 1.2 V the startup circuit is enabled.
AUX
I AUX(gate charge) = f ⋅ Q G
in
with a minimum current of 50 mA. Once
in
AUX
and V
pin. This will reduce power dissipation
. The current consumption due to
AUX
AUX
pins to help charge V
AUX
will not charge. If a load
AUX
is not loaded (driver,
is below 1.2 V, the
G
is the gate
AUX
AUX
AUX
(eq. 1)
AUX
inhibit
pin is
and
to
is
)