ISL6741IVZ Intersil, ISL6741IVZ Datasheet - Page 11

• Manufacturer Part Number: ISL6741IVZ
• Description: IC CTRLR PWM DBL ENDED 16-TSSOP
• Manufacturer: Intersil

Specifications of ISL6741IVZ

• Pwm Type: Current Mode
• Number Of Outputs: 2
• Frequency - Max: 2MHz
• Duty Cycle: 100%
• Voltage - Supply: 9 V ~ 16 V
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 16-TSSOP
• Frequency-max: 2MHz
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

node may be driven with an external error amplifier or opto-
coupler.
The ISL6740, ISL6741 features a built-in soft-start. Soft-start
is implemented as a clamp on the error voltage input.
OTS - The non-inverting input to the over-temperature
shutdown comparator. The signal input at this pin is
compared to an internal threshold of V
this pin exceeds the threshold, the Fault signal is asserted
and the outputs are disabled until the condition clears. There
is a nominal 25μA switched current source used for
hysteresis. The amount of hysteresis is adjustable by
varying the source impedance of the signal into this pin.
OTS may be used to monitor parameters other than
temperature, such as voltage. Any signal for which a high
out-of-bounds monitor is desired may utilize the OTS
comparator.
FAULT - The Fault signal is asserted high whenever the
outputs, OUTA and OUTB, are disabled. This occurs during
an over-temperature fault, an input UV fault, a V
fault, or during an overcurrent (ISL6740) or short circuit
shutdown fault. Fault can be used to disable synchronous
rectifiers whenever the outputs are disabled.
Fault is a three-state output and is high impedance during
the soft-start cycle. Adding a pull-up resistor to VREF or a
pull-down resistor to ground determines the state of Fault
during soft-start. This feature allows the designer to use the
Fault signal to enable or disable output synchronous
rectifiers during soft-start.
UV - Undervoltage monitor input pin. A resistor divider
between the input source voltage and GND sets the
undervoltage lock out threshold. The signal is compared to
an internal 1.00V reference to detect an undervoltage or
inhibit condition.
CS - This is the input to the current sense comparator(s).
The IC has the PWM comparator for peak current mode
control (ISL6741) and an overcurrent protection comparator.
The overcurrent comparator threshold is set at 0.600V
nominal.
The CS pin is shorted to GND at the end of each switching
cycle. Depending on the current sensing source impedance,
a series input resistor may be required due to the delay
between the internal clock and the external power switch.
This delay may allow an overlap such that the CS signal may
be discharged while the current signal is still active. If the
current sense source is low impedance, it will cause
increased power dissipation.
ISL6740 - Exceeding the overcurrent threshold will start a
delayed shutdown sequence. Once an overcurrent condition
is detected, the soft-start charge current source is disabled.
The soft-start capacitor begins discharging through a 25μA
current source, and if it discharges to less than 4.25V
11
REF
/2. If the voltage at
REF
ISL6740, 1SL6741
UV
(Sustained Overcurrent Threshold), a shutdown condition
occurs and the OUTA and OUTB outputs are forced low.
When the soft-start voltage reaches 0.27V (Reset
Threshold) a soft-start cycle begins.
An overcurrent condition must be absent for 50μs before the
delayed shutdown control resets. If the overcurrent condition
ceases, and an additional 50μs period elapses before the
shutdown threshold is reached, no shutdown occurs. The SS
charging current is re-enabled and the soft-start voltage is
allowed to recover.
ISL6741 - The ISL6741 current mode controller does not
shutdown due to an overcurrent condition. The pulse-by-
pulse current limit characteristic of peak current mode
control limits the output current to acceptable levels.
GND - Reference and power ground for all functions on this
device. Due to high peak currents and high frequency
operation, a low impedance layout is necessary. Ground
planes and short traces are highly recommended.
OUTA and OUTB - Alternate half cycle output stages. Each
output is capable of 0.5A peak currents for driving logic level
power MOSFETs or MOSFET drivers. Each output provides
very low impedance to overshoot and undershoot.
VREF - The 5.00V reference voltage output. +1%/-2%
tolerance over line, load and operating temperature. Bypass
to GND with a 0.047μF to 2.2μF ceramic capacitor.
Capacitors outside of this range may cause oscillation.
SS - Connect the soft-start timing capacitor between this pin
and GND to control the duration of soft-start. The value of
the capacitor determines the rate of increase of the duty
cycle during start up, controls the overcurrent shutdown
delay (ISL6740), and the overcurrent and short circuit hiccup
restart period.
SCSET - Sets the duty cycle threshold that corresponds to a
short circuit condition. A resistive divider between R
GND or R
be used to adjust the SCSET threshold. If using a resistor
divider from either RTC or RTD, the impedance to GND
affects the oscillator timing and should be considered when
determining the oscillator timing components. Connecting
SCSET to GND disables short circuit shutdown and hiccup.
Functional Description
Features
The ISL6740, ISL6741 PWMs are an excellent choice for
low cost bridge and push-pull topologies for applications
requiring accurate duty cycle and deadtime control. With its
many protection and control features, a highly flexible design
with minimal external components is possible. Among its
many features are current mode control (ISL6741),
adjustable soft-start, overcurrent protection, thermal
protection, bidirectional synchronization, fault indication, and
adjustable frequency.
TD
and GND, or a voltage between 0V and 2V may
July 13, 2007
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FN9111.4
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