DS1629S+T&R Maxim Integrated Products, DS1629S+T&R Datasheet - Page 11

• Manufacturer Part Number: DS1629S+T&R
• Description: IC THERM/RTC/CALENDAR DIG 8-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS1629S+T&R

• Function: Thermometer, Thermostat
• Topology: ADC, Comparator, Oscillator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -55°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Full Temp Accuracy: +/- 2 C
• Digital Output - Bus Interface: Serial (2-Wire)
• Digital Output - Number Of Bits: 9 bit
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS1629
CAL = Clock Alarm Latch. This volatile status bit will be set to "1" when the clock comparator becomes
active. Once set, it will remain latched until DS1629 power is cycled. A "0" in this location indicates the
clock has never been in an alarm condition since the DS1629 was powered-up. This is a read-only bit
(writes to this location constitute a “don’t care”) and the power-up default is the flag cleared (CAL="0").
TAL = Thermal Alarm Latch. This volatile status bit will be set to "1" when the thermal comparator
becomes active. Once set, it will remain latched until DS1629 power is cycled. A "0" in this location
indicates the DS1629 temperature has never exceeded TH since power-up. This is a read-only bit (writes
to this location constitute a “don’t care”) and the power-up default is the flag cleared (TAL="0").
0 = Don’t care. "Don’t care" on a write, but will always read out as a "0".
2-WIRE SERIAL DATA BUS
The DS1629 supports a bi-directional two-wire bus and data transmission protocol. A device that sends
data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that
controls the message is called a “master.” The devices that are controlled by the master are “slaves.” The
bus must be controlled by a master device which generates the serial clock (SCL), controls the bus access,
and generates the START and STOP conditions. The DS1629 operates as a slave on the 2-wire bus.
Connections to the bus are made via the open-drain I/O lines SDA and SCL.
The following bus protocol has been defined:
· Data transfer may be initiated only when the bus is not busy.
· During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
the data line while the clock line is high will be interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH,
defines a START condition.
Stop data transfer: A change in the state of the data line, from LOW to HIGH, while the clock line is
HIGH, defines the STOP condition.
Data valid: The state of the data line represents valid data when, after a START condition, the data line
is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed
during the LOW period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The
number of data bytes transferred between START and STOP conditions is not limited, and is determined
th
by the master device. The information is transferred byte-wise and each receiver acknowledges with a 9
bit.
The maximum clock rate of the DS1629 is 400 kHz.
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