DS75LXS+ Maxim Integrated Products, DS75LXS+ Datasheet - Page 10

• Manufacturer Part Number: DS75LXS+
• Description: IC THERMOMETER/STAT DIG 8-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS75LXS+

• Function: Thermometer, Thermostat
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -55°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Temperature Threshold: Programmable
• Full Temp Accuracy: +/- 2 C
• Digital Output - Bus Interface: 2-Wire, SMBus
• Digital Output - Number Of Bits: 9 bit to 12 bit
• Supply Voltage (max): 3.7 V
• Supply Voltage (min): 1.7 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Supply Current: 1000 uA
• Ic Output Type: Digital
• Sensing Accuracy Range: ± 2°C
• Supply Voltage Range: 1.7V To 3.7V
• Resolution (bits): 12bit
• Sensor Case Style: SOIC
• No. Of Pins: 8
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Temperature Sensing Range: -55°C To +125°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 5. Start, Stop, and ACK Signals
Figure 6. Address Byte
The Address Pins A0–A2 are tri-state inputs. These can be low, high, or floating in any combination, resulting in 27
address possibilities. These map into the address byte according to Table 6.
Figure 7. Pointer Byte
GENERAL 2-WIRE INFORMATION
All data is transmitted MSb first over the 2-wire bus.
One bit of data is transmitted on the 2-wire bus each SCL period.
A pullup resistor is required on the SDA line and, when the bus is idle, both SDA and SCL must remain in a
logic-high state.
All bus communication must be initiated with a START condition and terminated with a STOP condition. During
a START or STOP is the only time SDA is allowed to change states while SCL is high. At all other times,
changes on the SDA line can only occur when SCL is low: SDA must remain stable when SCL is high.
After every 8-bit (1-byte) transfer, the receiving device must answer with an ACK (or NACK), which takes one
SCL period. Therefore, nine clocks are required for every 1-byte data transfer.
BIT 7
BIT 7
a
6
0
BIT 6
a
BIT 6
5
0
SDA
SCL
BIT 5
a
BIT 5
4
0
Condition
START
BIT 4
a
BIT 4
3
0
BIT 3
DS75LX: Digital Thermometer and Thermostat with Extended Addressing
a
BIT 3
2
0
BIT 2
a
BIT 2
1
0
10 of 13
…
…
BIT 1
a
BIT 1
0
P1
ACK (or NACK)
From Receiver
BIT 0
R/W ¯ ¯
BIT 0
P0
Condition
STOP