MCZ33811EG Freescale Semiconductor, MCZ33811EG Datasheet - Page 3

• Manufacturer Part Number: MCZ33811EG
• Description: IC SOLENOID MON 5-CH 16-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33811EG

• Applications: Solenoid Monitor
• Current - Supply: 1mA
• Voltage - Supply: 7 V ~ 17 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Product: Current Monitors
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1. 33811 Pin Definitions
Analog Integrated Circuit Device Data
Freescale Semiconductor
Pin Number
A functional description of each pin can be found in the Functional Pin Description section beginning on
10
11
1
2
3
4
5
6
7
8
9
Pin Name
D_GND
SOLM5
SOLM4
RESET
VPWR
SCLK
VSPI
VDD
SO
CS
SI
Pin Function
Ground
Output
Power
Power
Input
Input
Input
Input
Input
Input
Input
D_GND
RESET
Analog Voltage Supply The analog voltage supply provides the power for all the input amplifiers
Digital Voltage Supply
SCLK
VSPI
VDD
Solenoid Monitor 5
Solenoid Monitor 4
Serial Output Data
Serial Clock Input
Serial Input Data
SO
CS
SI
Formal Name
Digital Ground
Chip Select
Reset Input
Figure 3. 33811 Pin Connections
V
PIN CONNECTIONS
SPI
1
2
3
4
5
6
7
8
The VDD pin is the digital logic supply voltage used internally in the IC.
Digital ground for the internal control circuits of the IC. This ground should
be used for decoupling of the VDD supply.
The SO output pin is used to transmit serial data from the device to the
MCU. The SO pin remains tri-state until selected by the active low CS.
The serial output data is available to be latched by the MCU on the rising
edge of SCLK. The SO data transitions on falling edge of the SCLK.
The SI input pin is used to receive serial data from the MCU. The serial
input data is latched on the rising edge of SCLK, and the input data
transitions on the falling edge of SCLK.
The Chip Select input pin is an active low signal sent by the MCU to
indicate that the device is being addressed. This input requires CMOS
logic levels and has an internal active pull-up current source.
The SCLK input pin is used to clock in and out the serial data on the SI
and SO pins while being addressed by the CS. The SCLK signal consists
of a 50% duty cycle with CMOS logic levels. Input data is latched by the
device on the rising edge of SCLK while output data is changed on the
falling edge. SCLK is ignored by the device while CS is high.
The RESET pin, when pulled high, clears any fault bits and causes the
Serial Output pin to be tri-stated. The RESET pin operates at the CMOS
levels dictated by the VDD line and the state of the VSPI pin.
The VSPI pin determines the voltage levels for the SPI interface. It must
be connected to the same voltage supply (+5 volts or +3.3 Volts) as the
MCU’s SPI interface.
and other analog circuitry in the IC.
The Solenoid Monitor Input is connected to the solenoid coil at the output
driver. It monitors the current waveform through the solenoid coil as it
appears as a voltage across the output driver MOSFET.
The Solenoid Monitor Input is connected to the solenoid coil at the output
driver. It monitors the current waveform through the solenoid coil as it
appears as a voltage across the output driver MOSFET.
16
15
13
14
12
11
10
9
A_GND
N/C
SOLM1
SOLM2
SOLM3
SOLM4
SOLM5
VPWR
Definition
page
PIN CONNECTIONS
11.
33811
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