IR3504MPBF International Rectifier, IR3504MPBF Datasheet - Page 6

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IR3504MPBF

Manufacturer Part Number
IR3504MPBF
Description
IC CTRL XPHASE AMD SVID 32-MLPQ
Manufacturer
International Rectifier
Series
XPhase3™r
Datasheet

Specifications of IR3504MPBF

Applications
Processor
Current - Supply
10mA
Voltage - Supply
4.75 V ~ 7.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
*
Package
32-Lead MLPQ
Circuit
X-Phase Control IC
Switch Freq (khz)
250kHz to 1.5MHz
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PG Output
Under Voltage Threshold -
Voutx Decreasing
Under Voltage Threshold -
Voutx Increasing
Under Voltage Threshold
Hysteresis
OC Delay Time
SS/DELx to FBx Input Offset
Voltage
Charge Current
OC Delay/VID Off Discharge
Currents
Fault Discharge Current
Hiccup Duty Cycle
Charge Voltage
Delay Comparator Threshold
Delay Comparator Threshold
Delay Comparator Hysteresis
Discharge Comp. Threshold
Over-Current Comparators
Input Offset Voltage
OCSET Bias Current
2048-4096 Count Threshold
1024-2048 Count Threshold
Error Amplifiers
System Set-Point Accuracy
(Deviation from Table 1, 2, and
3 per test circuit in Figures 2A &
2B)
Input Offset Voltage
FB1 Bias Current
FB2 Bias Current
DC Gain
Bandwidth
Slew Rate
Sink Current
Source Current
Maximum Voltage
Minimum Voltage
Open Control Loop Detection
Threshold
Open Control Loop Detection
Delay
Enable Input
Blanking Time
VDAC References
Source Currents
Sink Currents
Page 6
PARAMETER
Reference to VDACx
Reference to VDACx
V(IINx) – V(OCSETx) = 500 mV
With FBx = 0V, adjust V(SS/DELx) until
EAOUTx drives high
Note 1
I(Fault) / I(Charge)
Relative to Charge Voltage, SS/DELx
rising Note 1
Relative to Charge Voltage, SS/DELx
falling Note 1
Note 1
1V ≤ V(OCSETx) ≤ 3.3V
Adjust ROSC value to find threshold
Adjust ROSC value to find threshold
VID > 1.0V
0.8V ≤ VID ≤ 1.0V
0.5V ≤ VID < 0.8V
Measure V(FBx) – V(VDACx)). Note 2
Note 1
Note 1
Note 1
Measure V(VCCL) – V(EAOUTx)
Measure V(VCCL) - V(EAOUT), Relative
to Error Amplifier maximum voltage.
Measure PHSOUT pulse numbers from
V(EAOUTx) = V(VCCL) to PG = low.
Noise Pulse < 100ns will not register an
ENABLE state change. Note 1
Includes I(OCSETx)
Includes I(OCSETx)
TEST CONDITION
-12%
-0.65
MIN
-365
-325
-5%
-5%
-8%
300
150
100
500
125
-30
0.7
-30
2.5
3.5
5.5
0.4
6.0
20
75
-8
-9
-1
-1
8
5
Vrosc(V)*1000
Vrosc(V)*1000
3000*Vrosc(V)
1000*Vrosc(V)
/ ROSC(k )
/ ROSC(k )
/Rosc(K )
/Rosc(K )
TYP
-315
-275
11.4
32.5
0.85
650
130
200
110
780
120
300
250
1.4
-50
4.5
3.9
8.5
47
10
80
60
30
12
53
0
0
0
8
July 28, 2009
+12%
MAX
1000
IR3504
+5%
0.65
+5%
13.0
+8%
300
135
950
250
600
400
-265
-225
1.9
-70
6.5
4.2
110
30
+8
+9
12
40
20
1
1
1
Pulses
uA/uA
UNIT
MHz
V/µs
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
mV
mV
mV
µA
µA
µA
µA
k
k
µA
µA
dB
µA
µA
us
ns
mV
mV
mV
%
V
V

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