MC10XS3435DPNA Freescale Semiconductor, MC10XS3435DPNA Datasheet - Page 37
MC10XS3435DPNA
Manufacturer Part Number
MC10XS3435DPNA
Description
IC SWITCH HIGH SIDE QUAD 24QFN
Manufacturer
Freescale Semiconductor
Type
High Side Switchr
Datasheet
1.MC10XS3435DPNA.pdf
(51 pages)
Specifications of MC10XS3435DPNA
Number Of Outputs
4
Rds (on)
2 x 10 mOhm, 2 x 35 mOhm
Internal Switch(s)
Yes
Current Limit
5A
Voltage - Input
4 ~ 28 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-PQFN, 24-PowerQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
on the CSNS pin for the corresponding output. The default
value [0] is the low ratio
ADDRESS A
REGISTER (OCR)
corresponding output over-current protection through the
SPI. Each output “s” is independently selected for
configuration based on the state of the D14 : D13 bits
(Table
Xenon 55 W or 28 W bulb over-current profile, as described
Figure
Table 15. Current Sense Ratio Selection
Analog Integrated Circuit Device Data
Freescale Semiconductor
Figure 14. Over-current Profile Depending on Xenon Bit
I
I
I
I
OCLO4
OCLO3
OCLO2
OCLO1
I
I
I
I
I
I
I
I
A logic [1] on bit D0 (CSNS_ratio_s) selects the high ratio
The OCR_s register allows the MCU to configure
A logic [1] on bit D8 (Xenon_s) disables enables the
Xenon bit set to logic [0]:
OCH
OCH
Xenon bit set to logic [1]:
OCH
OC
OC
OC
OC
OCH2
I
I
I
I
I
I
OC
OC
OC
OC1
OC1
OC2
L4
L3
L2
L1
CSNS_high_s (D0)
t
1
2
2
3
4
t
1
12).
14.
OC1
OC1
t
t
OC2
OC2
t
t
OC3
OC3
0
1
1
A
0
t
t
100 — OUTPUT OVER-CURRENT
OC4
OC4
t
t
(Table
OC5
OC5
t
OC6
t
15).
OC6
Current Sense Ratio
CRS0 (default)
t
t
OC7
OC7
CRS1
Time
Time
curve and D[5:4] bits inrush curve for selected output, as
shown
replaced by OCHI2 during t
current levels in steady state, as defined in
Table 16. Cooling Curve Selection
Table 17. Inrush Curve Selection
Figure 15. Over-current Profile with OCHI Bit Set to ‘1’
I
I
I
I
I
I
OCH
OCH
Table 18. Output Steady State Selection
OC
OC
OC
OC
OCLO1 (D2) OCLO0 (D1)
D[7:6] bits allow to MCU to programmable bulb cooling
A logic [1] on bit D3 (OCHI_s bit) the OCHI1 level is
The wire harness is protected by one of four possible
I
I
I
I
OC1
OC
OC
OC
BC1_s (D7)
OC1_s (D5)
L4
L3
L2
L1
1
2
2
3
4
t
OC1
Table 16
0
0
1
1
0
0
1
1
t
0
0
1
1
OC2
t
OC3
and
t
OC4
0
1
0
1
Table
BC0_s (D6)
t
OC0_s (D4)
LOGIC COMMANDS AND REGISTERS
OC5
FUNCTIONAL DEVICE OPERATION
17.
0
1
0
1
OC1
0
1
0
1
t
OC6
, as shown
Steady State Current
OCLO2 (default)
Profile Curves Speed
OCLO3
OCLO4
OCLO1
Profile Curves Speed
t
OC7
medium (default)
Figure
slow (default)
Table
very slow
medium
medium
slow
fast
fast
15.
18.
10XS3435
Time
37