ISL6144IVZA-T Intersil, ISL6144IVZA-T Datasheet - Page 7

• Manufacturer Part Number: ISL6144IVZA-T
• Description: IC CTRLR MOSFET HV ORING 16TSSOP
• Manufacturer: Intersil

Specifications of ISL6144IVZA-T

• Applications: Telecom/Datacom Systems
• Fet Type: N-Channel
• Number Of Outputs: 1
• Internal Switch(s): No
• Delay Time - On: 1ms
• Delay Time - Off: 250ns
• Voltage - Supply: 10 V ~ 75 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

The slow turn-off is achieved in two stages. The first stage
starts with a slow turn-off action and lasts for up to 20µs. The
gate pull down current for the first stage is 2mA. The second
slow turn-off stage completes the gate turn-off with a 10mA
pull down current. The 20µs delay filters out any false trip off
due to noise or glitches that might be present on the supply
line.
The gate turn-on and gate turn-off drivers have a 50kHz filter
to reduce the variation in FET forward voltage drop (and FET
gate voltage) due to normal SMPS system switching noises
(typically higher than 50kHz). These filters do not affect the
total turn-on or slow turn-off times.
Special system design precautions must be taken to insure
that no AC mains related low frequency noise will be present
at the input or output of ISL6144. Filters and multiple power
conversion stages, which are part of any distributed DC
power system, normally filter out all such noise.
HS Comparator-Fast Turn-off
There is a High Speed (HS) Comparator used for fast turn-
off of the ORing MOSFET to protect the common bus
against hard short faults at a sourcing power supply output
(refer to Figure 1).
During normal operation the gate of the ORing MOSFET is
charge pumped to a voltage that depends on whether it is in
the 20mV regulation mode or fully enhanced. In this case:
If a dead short fault occurs in the sourcing supply, it causes
V
than one supply are paralleled. In the absence of the
ISL6144 functionality, a very high reverse current will flow
from Output to the Input supply pulling down the common
DC Bus, resulting in an overall “catastrophic” system failure.
V
FROM
SOURCING
SUPPLY
IN
OUT
to drop very quickly while V
=
VIN
V
IN
–
I
OUT
2A*
FIGURE 1. HS COMPARATOR
GATE
DRIVER
•
r
DS(ON )
COMP
HS
+
-
VIN
7
OUT
HV PASS
CLAMP
AND
V
is not affected as more
TH(HS)
5.3V
VOUT
COMP
VSET
BIAS
TO SHARED
R
1
+ R
LOAD
2
R
R
(EQ. 1)
= 50kΩ
1
2
C
2
ISL6144
The fault can be detected and isolated by using the ISL6144
and an N-Channel ORing MOSFET. V
V
The fast turn-off mechanism will be activated and the
MOSFET(s) will be turned off very quickly. The speed of this
turn-off depends on the amount of equivalent gate loading
capacitance. For an equivalent Cgs = 39nF. The gate turn-off
time is <300ns and gate pull down current is 2A.
The level of V
by means of external resistors R
theoretically ranging from 0V to 5.3V. Typical values are
0.05V to 0.3V. This is done in order to avoid false turn-off
due to noise or minor glitches present in the DC switching
power supply. The threshold voltage is calculated as
Equation 3:
Where V
typical) between V
chosen such that their sum is about 50kΩ. An external
capacitor, C
provide high frequency decoupling. The HS comparator has
an internal delay time on the order of 50ns, which is part of
the <300ns overall turn-off time specification (with
Cgs = 39nF).
Gate Logic and Charge Pump
The IC has two charge pumps. The first charge pump
generates the floating gate drive for the N-Channel
MOSFET. The second charge pump output current opposes
the pull down current of the slow turn-off transistor to provide
regulation of the GATE voltage.
The presence of the charge pump allows the use of an
N-Channel MOSFET with a floating gate drive. The
N-Channel MOSFETs normally have lower r
mention cost saving) compared to P-Channel MOSFETs,
allowing further reduction of conduction losses.
BIAS and REF
Bias currents for the two internal zener supplies (HVREF
and VSET) is provided by this block. This block also
provides a 0.6V band-gap reference used in the UV
detection circuit.
Undervoltage Comparator
The undervoltage comparator compares HVREF to 0.6V
internal reference. Once it falls below this level the UV
circuitry pulls and holds down the gate pin as long as the
HVREF UV condition is present. Voltage at both VIN and
HVREF pins track each other.
V
V IN
V COMP
V
COMP
TH HS
TH(HS)
(
<
V COMP
, and whenever:
)
is defined below
REF(VSET)
=
=
V OUT V TH
------------------------- - V
(
2
R
, is needed between V
TH(HS)
1
;
R
where
+
1
R
–
2
OUT
)
is an internal zener reference (5.3V
(HS Comparator trip level) is adjustable
REF VSET
and VSET pins. R
(
HS
(
)
)
1
and R
OUT
IN
2
and COMP pins to
is compared to
1
to a value
and R
DS(ON)
2
January 6, 2011
must be
(not to
FN9131.6
(EQ. 2)
(EQ. 3)