MAX3946ETG+ Maxim Integrated Products, MAX3946ETG+ Datasheet - Page 10

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MAX3946ETG+

Manufacturer Part Number
MAX3946ETG+
Description
IC LASER DVR SFP 11.3GBPS 24TQFN
Manufacturer
Maxim Integrated Products
Type
Laser Diode Driverr
Datasheet

Specifications of MAX3946ETG+

Data Rate
11.3Gbps
Number Of Channels
1
Voltage - Supply
2.85 V ~ 3.63 V
Current - Supply
68mA
Current - Modulation
80mA
Current - Bias
80mA
Operating Temperature
-40°C ~ 85°C
Package / Case
12-WFQFN, Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.0625Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
10
6, 7, 12, 13
10, 11
1, 15
PIN
8, 9
_____________________________________________________________________________________
14
16
17
2
3
4
5
DISABLE
TOUT+
FAULT
BMON
NAME
TOUT-
BMAX
V
CSEL
V
BIAS
SDA
CCD
CCT
Power Supply. Provides supply voltage to the digital block.
Disable Input, CMOS Input. Set to logic-low for normal operation. Logic-high or open disables both
the modulation current and the bias current. Internally pulled up by a 7.5kI resistor to V
Fault Output, Open Drain. Logic-high indicates a fault condition. FAULT remains high even after the
fault condition has been removed. A logic-low occurs when the fault condition has been removed and
the fault latch has been cleared by toggling the DISABLE pin. FAULT should be pulled up to V
a 4.7kI to 10kI resistor.
Analog Laser Bias-Current Limit. A resistive voltage-divider connected among BMON, BMAX, and
ground sets the maximum allowed laser bias current limit. The voltage at BMAX is internally com-
pared to 1.2V bandgap reference voltage.
Bias Current-Monitor Output. Current out of this pin develops a ground-referenced voltage across
external resistor(s) that is proportional to the laser bias current. The current sourced by this pin is
typically 1/100th the BIAS pin current.
Power Supply. Provides supply voltage to the output block.
Inverted Modulation Current Output. Internally pulled up by a 25I resistor to V
Noninverted Modulation Current Output. Internally pulled up by a 25I resistor to V
Laser Bias Current Connection
Chip-Select Input, CMOS. Setting CSEL to logic-high starts a cycle. Setting CSEL to logic-low ends
the cycle and resets the control state machine. Internally pulled down by a 75kI resistor to ground.
Serial-Data Bidirectional Input, CMOS. Open-drain output. This pin has a 75kI internal pullup, but it
requires an external 4.7kI to 10kI pullup resistor. (Data line-collision protection is implemented.)
TOP VIEW
*EXPOSED PAD CONNECTED TO GROUND.
V
TIN+
V
TIN-
V
V
EET
EET
CC
CC
19
20
21
22
23
24
18
1
+
17
2
(4mm × 4mm)
THIN QFN
MAX3946
16
3
15
4
*EP
14
5
FUNCTION
13
6
12
11
10
9
8
7
V
TOUT+
TOUT+
TOUT-
TOUT-
V
CCT
CCT
Pin Configuration
Pin Description
CCT
.
CCT
.
CCD
.
CC
by

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