PCA9513ADP,118 NXP Semiconductors, PCA9513ADP,118 Datasheet
PCA9513ADP,118
Specifications of PCA9513ADP,118
935279865118
PCA9513ADP-T
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PCA9513ADP,118 Summary of contents
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PCA9513A; PCA9514A Hot swappable I Rev. 04 — 18 August 2009 1. General description The PCA9513A and PCA9514A are hot swappable I I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the ...
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... NXP Semiconductors current source on SCLIN and SDAIN for PICMG backplane applications (PCA9513A only) I Supports clock stretching and multiple master arbitration and synchronization I Operating power supply voltage range 400 kHz clock frequency I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per ...
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... NXP Semiconductors Standard packing quantities and other packaging data are available at www.standardics.nxp.com/packaging/. 6. Block diagram PCA9513A 92 A OVER- VOLTAGE CUT-OFF SDAIN 92 A OVER- VOLTAGE CUT-OFF SCLIN 0.55V / CC 0.45V CC UVLO ENABLE Fig 1. Block diagram of PCA9513A PCA9513A_PCA9514A_4 Product data sheet Hot swappable SLEW RATE ...
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... NXP Semiconductors PCA9514A SDAIN SCLIN 0.55V / CC 0.45V CC UVLO ENABLE Fig 2. Block diagram of PCA9514A PCA9513A_PCA9514A_4 Product data sheet Hot swappable SLEW RATE DETECTOR BACKPLANE-TO-CARD CONNECTION CONNECT 2 mA SLEW RATE DETECTOR BACKPLANE-TO-CARD CONNECTION CONNECT STOP BIT AND BUS IDLE 0 100 s DELAY 0.5 pF Rev. 04 — 18 August 2009 PCA9513A ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning ENABLE SCLOUT SCLIN Fig 3. 7.2 Pin description Table 3. Symbol ENABLE SCLOUT SCLIN GND READY SDAIN SDAOUT Functional description Refer to PCA9514A”. 8.1 Start-up An undervoltage and initialization circuit holds the parts in a disconnected state which presents high-impedance to all SDAn and SCLn pins during power-up. A LOW on the ENABLE pin also forces the parts into the low current disconnected state when the I essentially zero ...
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... NXP Semiconductors HIGH for the bus idle time or when all pins are HIGH and a STOP condition is seen on the SDAIN and SCLIN pins, SDAIN is connected to SDAOUT and SCLIN is connected to SCLOUT pull-up current source on SDAIN and SCLIN of the PCA9513A is activated during the initialization state and remains active until the power is removed or the ENABLE pin is taken LOW ...
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... NXP Semiconductors The PCA9510A (rise time accelerator is permanently disabled) and the PCA9512A (rise time accelerator can be turned off) are a little different with the rise time accelerator turned off because the rise time accelerator will not pull the node up, but the same logic that turns on the accelerator turns the pull-down off ...
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... NXP Semiconductors The t PHL below 0.7V maximum slew rate, and even if the input slew rate is slow enough that the output catches up it will still lag the falling voltage of the input by the offset voltage. The maximum t occurs when the input is driven LOW with zero delay and the output is still limited by its turn-on delay and the falling edge slew rate ...
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... NXP Semiconductors rise time = 300 ns 20 rise time = (1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with PCA9513A/PCA9514A. (2) Rise time without PCA9513A/PCA9514A. Fig 6. Bus requirements for 3.3 V systems (1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with PCA9513A/PCA9514A. (2) Rise time without PCA9513A/PCA9514A. ...
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... NXP Semiconductors 8.9 Hot swapping and capacitance buffering application Figure 8 applications that take advantage of both its hot swapping and capacitance buffering features. In all of these applications, note that if the I/O cards were plugged directly into the backplane, all of the backplane and card capacitances would add directly together, making rise and fall time requirements diffi ...
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... NXP Semiconductors BACKPLANE CONNECTOR BACKPLANE V CC BD_SEL SDA SCL Fig 9. Hot swapping multiple I/O cards into a backplane using the PCA9513A in a cPCI, VME, and AdvancedTCA system PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable I I/O PERIPHERAL CARD 1 POWER SUPPLY HOT SWAP ...
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... NXP Semiconductors BACKPLANE CONNECTOR BACKPLANE SDA SCL Fig 10. Hot swapping multiple I/O cards into a backplane using the PCA9514A in a PCI system Fig 11. System with disparate V PCA9513A_PCA9514A_4 Product data sheet ENABLE SDAIN SCLIN C2 0.01 F ENABLE SDAIN SCLIN C4 0. drop 0. ENABLE SDA SDAIN ...
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... NXP Semiconductors 9. Application design-in information Fig 12. Typical application of PCA9513A Fig 13. Typical application of PCA9514A PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable (2 5 SCLIN 6 SDAIN 1 ENABLE ENABLE GND SCLIN 6 SDAIN 1 ENABLE ENABLE GND Rev. 04 — 18 August 2009 2 C-bus and SMBus bus buffer ...
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... NXP Semiconductors 10. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage CC V voltage on any other pin n T operating temperature oper T storage temperature stg T solder point temperature sp T maximum junction temperature j(max) [1] Voltages with respect to pin GND. ...
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... NXP Semiconductors Table 5. Characteristics …continued +85 C; unless otherwise specified. CC amb Symbol Parameter Rise time accelerators I transient boosted pull-up trt(pu) current Input-output connection V offset voltage offset t LOW to HIGH propagation PLH delay t HIGH to LOW propagation PHL delay C SCL and SDA input ...
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... NXP Semiconductors [3] Delays that can occur after ENABLE and/or idle times have passed. [4] Guaranteed by design, not production tested. [5] I varies with temperature and V trt(pu) [6] Input pull-up voltage should not exceed power supply voltage in operating mode because the rise time accelerator will clamp the voltage to the positive supply rail ...
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... NXP Semiconductors 11.2 Timing diagrams SDAn/SCLn ENABLE READY Fig 18. Timing for idle(READY) SDAIN SCLIN SCLOUT SDAOUT ENABLE READY t is only applicable after the t stp(READY) Fig 19. t that can occur after t stp(READY) SCLIN, SDAIN, SCLOUT, SDAOUT ENABLE READY t is only applicable after the t stp(READY) Fig 20 ...
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... NXP Semiconductors 12. Test information R = load resistor load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T Fig 21. Test circuitry for switching times PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable PULSE DUT GENERATOR Rev. 04 — 18 August 2009 ...
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... NXP Semiconductors 13. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 24. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 15. Abbreviations Table 8. Acronym AdvancedTCA CDM cPCI DUT ESD HBM 2 I C-bus MM PCI PICMG SMBus ...
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... NXP Semiconductors 16. Revision history Table 9. Revision history Document ID Release date PCA9513A_PCA9514A_4 20090818 • Modifications: • • PCA9513A_PCA9514A_3 20090720 PCA9513A_PCA9514A_2 20090528 PCA9513A_PCA9514A_1 20051011 PCA9513A_PCA9514A_4 Product data sheet Data sheet status Product data sheet Section 8.8 “Resistor pull-up value “... always choose R ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Feature selection . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 Start-up 8.2 Connect circuitry 8.3 Maximum number of devices in series . . . . . . . 6 8.4 Propagation delays . . . . . . . . . . . . . . . . . . . . . . 7 8 ...