ADE7757ARN Analog Devices Inc, ADE7757ARN Datasheet - Page 10

• Manufacturer Part Number: ADE7757ARN
• Description: IC ENERGY METERING 16-SOIC
• Manufacturer: Analog Devices Inc

Specifications of ADE7757ARN

• Rohs Status: RoHS non-compliant
• Input Impedance: 320 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 5mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Meter Type: Single Phase

ADE7757
Typical Connection Diagrams
Figure 7 shows a typical connection diagram for Channel V1. A
shunt is the current sensor selected for this example because of
its low cost compared to other current sensors such as the CT
(current transformer). This IC is ideal for low current meters.
Figure 8 shows a typical connection for Channel V2. Typically,
the ADE7757 is biased around the phase wire, and a resistor
divider is used to provide a voltage signal that is proportional to
the line voltage. Adjusting the ratio of R
convenient way of carrying out a gain calibration on a meter.
POWER SUPPLY MONITOR
The ADE7757 contains an on-chip power supply monitor. The
power supply (V
If the supply is less than 4 V, the ADE7757 becomes inactive.
This is useful to ensure proper device operation at power-up
and power-down. The power supply monitor has built in hyster-
esis and filtering that provide a high degree of immunity to false
triggering from noisy supplies.
As can be seen from Figure 9, the trigger level is nominally set
at 4 V. The tolerance on this trigger level is within 5%. The
power supply and decoupling for the part should be such that
the ripple at V
normal operation.
NEUTRAL
Figure 8. Typical Connections for Channel V2
Figure 7. Typical Connection for Channel V1
PHASE
DD
PHASE
DD
SHUNT
AGND
does not exceed 5 V
) is continuously monitored by the ADE7757.
R
NEUTRAL
A
*
R
B
*R
R
R
F
F
A
30mV
R
>> R
F
B
+ R
C
F
C
F
C
F
F
R
F
V1P
V1N
165mV
A
5% as specified for
, R
C
B
F
, and R
V2P
V2N
F
is also a
–10–
HPF and Offset Effects
Figure 10 illustrates the effect of offsets on the real power calcu-
lation. As can be seen, offsets on Channel V1 and Channel V2
will contribute a dc component after multiplication. Since this
dc component is extracted by the LPF and used to generate the
real power information, the offsets will contribute a constant
error to the real power calculation. This problem is easily avoided
by the built-in HPF in Channel V1. By removing the offsets
from at least one channel, no error component can be generated
at dc by the multiplication. Error terms at the line frequency ( )
are removed by the LPF and the digital-to-frequency conversion
(see Digital-to-Frequency Conversion section).
The equation below shows how the power calculation is affected
by the dc offsets in the current and voltage channels.
V
V
V
Figure 10. Effect of Channel Offset on the Real
Power Calculation
ACTIVATION
cos
V
2
INTERNAL
2
OS
Figure 9. On-Chip Power Supply Monitor
V
I
I
2
I
OS
I
V
t
V
cos
5V
4V
0V
DD
OS
0
V
INACTIVE
2
OS
I
t
OS
DC COMPONENT (INCLUDING ERROR TERM)
IS EXTRACTED BY THE LPF FOR REAL
POWER CALCULATION
I
V
I
V
cos
FREQUENCY – RAD/s
OS
OS
OS
ACTIVE
TIME
V
I
I
t
cos
I
OS
t
INACTIVE
I
OS
V
cos
REV. A
t