CS5462-ISZ Cirrus Logic Inc, CS5462-ISZ Datasheet - Page 11

• Manufacturer Part Number: CS5462-ISZ
• Description: IC ENERGY METERING 1PHASE 24SSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5462-ISZ

• Input Impedance: 30 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 0.8V
• Voltage - I/o Low: 0.2V
• Current - Supply: 2.9mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Meter Type: Single Phase
• Input Voltage: 5V
• No. Of Outputs: 2
• Power Dissipation Pd: 500mW
• Supply Voltage Range: 3.3V To 5V
• No. Of Pins: 24
• Operating Temperature Range: -40°C To +85°C
• Termination Type: SMD
• No. Of Channels: 2
• Output Voltage Range: 2.4 V to 2.6 V
• Output Current: 1 uA
• Input Voltage Range: 2.4 V to 2.6 V
• Input Current: 25 nA
• Power Dissipation: 500 mW
• Mounting Style: SMD/SMT
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

3.1
A computational flow diagram for the two data
paths is shown in Figure 1. The analog waveforms
at the voltage/current channel inputs are subject to
the gains of the input PGAs.
3.1.1
The modulators convert the analog input voltages
on the I and V channels to a digital bitstream; which
is then filtered by the digital filter section. The digi-
tal filter is composed of low pass sinc
ters. The IIR filters are used to compensate for the
magnitude roll-off of the low pass filter section.
Both channels provide a high-pass filter option
which can be engaged into the signal path to re-
move the DC content from the current/voltage signal
before the energy calculations are made.
3.1.2
After being filtered, the instantaneous voltage and
current digital codes are used to calculate real av-
VIN±
IIN±
Theory of Operation
Digital Filters
Gain Calibration
PGA
10x
Modulator
Modulator
2
4
nd
th
∆Σ
∆Σ
Order
Order
Digital
Filters
Digital
Filters
HPF
HPF
3
and IIR fil-
Figure 1. Data Flow
PGA Gain Select
HPF Select
erage power. This power is then adjusted based on
the internal calibration setting defined at startup.
Calibrating the CS5462 is done by externally con-
necting the configuration input pins, CAL1 and
CAL0, to the program select output pins, P1 - P7,
in a particular sequence. These connections will in-
ternally compensate for small gain errors.
3.1.3
The calibrated energy value is then converted into
a pulse output stream with a average frequency
proportional to the measured energy. Pulse output
pins E1 and E2 can be set to lower frequencies to
directly drive a stepper motor or a mechanical
counter or interface a microcontroller or infrared
LED. The FOUT pulse output pin is set to max fre-
quency of 10 kHz. With full scale inputs on both the
current and voltage channels FOUT will output
pulses with an average frequency of 10 kHz.
x
Configuration
On-Chip
x
Energy-to-Frequency Conversion
Calibration
Output Mode Select
Freq Select
Pulse Rate
Converter
Energy to
CS5462
E1
E2
FOUT
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