MAX7456EUI+T Maxim Integrated Products, MAX7456EUI+T Datasheet - Page 31

• Manufacturer Part Number: MAX7456EUI+T
• Description: IC DISPLAY 1CH W/EEPROM 28TSSOP
• Manufacturer: Maxim Integrated Products
• Type: OSD (On-Screen Display) Video Generatorr

Specifications of MAX7456EUI+T

• Applications: Security Systems, Video Routing
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Current - Supply: 58mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Interface: SPI Serial
• Display Type: OSD
• Digits Or Characters: 256 Characters
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Configuration: -
• Lead Free Status / Rohs Status: Details

Table 4. Character Background Control
Write address = 05H, read address = 85H.
Read/write access: unrestricted.
Write address = 06H, read address = 86H.
Read/write access: unrestricted.
X = Don’t care.
BIT
7–2
BIT
7–0
1
0
Display Memory Address High Register
SYNC MODE
Display Memory Address Low Register
External
Internal
DEFAULT
DEFAULT
0000 0000
0000 00
______________________________________________________________________________________
0
0
Single-Channel Monochrome On-Screen
BACKGROUND MODE,
Don’t Care
Byte Selection Bit
This bit is valid only when in the 8-bit operation mode (DMM[6] = 1).
0 = Character Address byte is written to or read (DMDI[7:0] contains the Character Address byte).
1 = Character Attribute byte is written to or read (DMDI[7:0] contains the Character Attribute byte).
Display Memory Address Bit 8
This bit is the MSB of the display-memory address. The display-memory address sets the location
of a character on the display (Figure 10). The lower order 8 bits of the display-memory address is
found in DMAL[7:0].
Display Memory Address Bits 7–0
This byte is the lower 8 bits of the display-memory address. The display-memory address sets the
location of a character on the display (Figure 10). The MSB of the display-memory address is
DMAH[0].
VM1[7]
0
0
1
X
Display with Integrated EEPROM
(DMAH)
(DMAL)
LOCAL BACKGROUND
To write to this register, the following condition must be
met:
DMM[2] = 0, the display memory is not in the process
of being cleared.
To write to this register, the following condition must be
met:
DMM[2] = 0, the display memory is not in the process
of being cleared.
CONTROL BIT, LBC
DMM[5], DMDI[7]
FUNCTION
FUNCTION
0
1
X
X
BACKGROUND PIXEL
CHARACTER
Input Video
Gray
Gray
Gray
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