LTC6802IG-1#PBF Linear Technology, LTC6802IG-1#PBF Datasheet
LTC6802IG-1#PBF
Specifications of LTC6802IG-1#PBF
Available stocks
Related parts for LTC6802IG-1#PBF
LTC6802IG-1#PBF Summary of contents
Page 1
... High Power Portable Equipment n Backup Battery Systems n High Voltage Data Acquisition Systems L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION NEXT 12-CELL PACK ABOVE ...
Page 2
... Storage Temperature Range .................. –65°C to 150° ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC6802IG-1#PBF LTC6802IG-1#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: ...
Page 3
ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER DC Specifications V Measurement Resolution ACC ADC Offset Voltage ADC Gain Error V Total Measurement Error ERR V Cell Voltage Range CELL V Common Mode Voltage Range Measured CM ...
Page 4
LTC6802-1 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER Discharge Switch On-Resistance Temperature Range Thermal Shutdown Temperature Thermal Shutdown Hysteresis Voltage Mode Timing Specifications t Measurement Cycle Time CYCLE t SDI Valid to SCKI Rising Setup 1 ...
Page 5
TYPICAL PERFORMANCE CHARACTERISTICS Cell Measurement Total Unadjusted Error –40° 25° 85° 125° –2 –4 –6 –8 –10 0 0.5 1.0 1.5 2.0 ...
Page 6
LTC6802-1 TYPICAL PERFORMANCE CHARACTERISTICS Cell Input Bias Current During Conversion 2.70 CELL INPUT = 3.6V 2.65 2.60 2.55 2.50 2.45 2.40 2.35 –40 – 100 120 TEMPERATURE (°C) 68021 G10 Internal Die Temperature Measurement vs ...
Page 7
TYPICAL PERFORMANCE CHARACTERISTICS V Line Regulation REG 5.5 5.0 4 25°C A 4.0 3.5 NO EXTERNAL LOAD ON V (CONTINUOUS CELL CONVERSIONS) 3 SUPPLY VOLTAGE (V) Die Temperature Increase vs Discharge Current in Internal FET ...
Page 8
LTC6802-1 PIN FUNCTIONS CSBO (Pin 1): Chip Select Output (Active Low). CSBO is a buffered version of the chip select input, CSBI. CSBO drives the next IC in the daisy chain. See Serial Port in the Applications Information section. SDOI ...
Page 9
PIN FUNCTIONS GPIO1, GPIO2 (Pins 38, 39): General Purpose Input/Out- put. The operation of these pins depends on the state of the MMB pin. When MMB is high, the pins behave as traditional GPIOs. By writing a “0” ...
Page 10
LTC6802-1 BLOCK DIAGRAM 5 C12 10k 6 S12 7 C11 10k 10k 10k – V 10Ω 30 DIE NC TEMP 10 Δ∑ A/D CONVERTER MUX REFERENCE EXTERNAL TEMP V ...
Page 11
TIMING DIAGRAM SCKI D3 SDI CSBI D4 D3 SDO PREVIOUS COMMAND OPERATION THEORY OF OPERATION The LTC6802 data acquisition IC capable of mea- suring the voltage of 12 series connected battery cells. An input ...
Page 12
LTC6802-1 OPERATION BATTERY POSITIVE 350V LTC6802 CSBO CSBI SDOI SDO SCKO SDI + V SCKI C12 V MODE S12 GPIO2 C11 GPIO1 S11 WDTB C10 MMB S10 TOS C9 V REG S9 V REF C8 V TEMP2 S8 ...
Page 13
OPERATION MUX C2 C1 – V Figure 2. Open Connection MUX – V Figure 3. Open Connection with RC Filtering Figure 3 shows an open connection ...
Page 14
LTC6802-1 OPERATION through C11 by looking at the measurements of cells B2 through B12. Therefore the algorithm cannot be used to determine if the topmost C pin is open. Fortunately, an open wire from the battery to the top C ...
Page 15
OPERATION POWER DISSIPATION AND THERMAL SHUTDOWN The MOSFETs connected to the pins S1 through S12 can be used to discharge battery cells. An external resistor should be used to limit the power dissipated by the MOSFETs. The maximum power dissipation ...
Page 16
LTC6802-1 APPLICATIONS INFORMATION USING THE LTC6802-1 WITH LESS THAN 12 CELLS The LTC6802-1 can typically be used with as few as four cells. The minimum number of cells is governed by the supply voltage requirements of the LTC6802-1. The sum ...
Page 17
APPLICATIONS INFORMATION MODES OF OPERATION The LTC6802-1 has three modes of operation: standby, measure and monitor. Standby mode is a power saving state where all circuits except the serial interface are turned off. In measure mode, the LTC6802-1 is used ...
Page 18
LTC6802-1 APPLICATIONS INFORMATION BATTERY POSITIVE LTC6802-1 CSBI CSBO SDO SDOI SDI SCKO + SCKI V V C12 MODE GPIO2 S12 GPIO1 C11 WDTB S11 MMB C10 TOS S10 V C9 REG V S9 REF V C8 TEMP2 V S8 TEMP1 ...
Page 19
APPLICATIONS INFORMATION Table 1. Monitor Mode Cell Selection WDTB GPIO2 GPIO1 CELL INPUTS MONITORED MMB ...
Page 20
LTC6802-1 APPLICATIONS INFORMATION The voltage mode pin (V ) determines whether the low MODE side serial port is configured as voltage mode or current mode. For the bottom device in a daisy-chain stack, this pin must be pulled high (tied ...
Page 21
APPLICATIONS INFORMATION CSBI SCKI SDI MSB (CMD) SDO Network Layer Broadcast Commands: A broadcast command is one to which all devices on the bus will respond. See the Bus Protocols and Commands sections. In daisy chained configurations, all devices in ...
Page 22
LTC6802-1 APPLICATIONS INFORMATION out will be low when any device is busy performing an A/D conversion and will be high when no device is busy. Similarly, when polling for interrupt status, the output will be low when any device has ...
Page 23
APPLICATIONS INFORMATION Commands Table 6. Command Codes Write Configuration Register Group Read Configuration Register Group Read Cell Voltage Register Group Read Flag Register Group Read Temperature Register Group Start Cell Voltage A/D Conversions and Poll Status Start Open Wire A/D ...
Page 24
LTC6802-1 APPLICATIONS INFORMATION Memory Map Table 7 through Table 12 show the memory map for the LTC6802-1. Table 12 gives bit descriptions. Table 7. Configuration (CFG) Register Group REGISTER RD/WR BIT 7 CFGR0 RD/WR WDT CFGR1 RD/WR DCC8 CFGR2 RD/WR ...
Page 25
APPLICATIONS INFORMATION Table 9. Flag (FLG) Register Group REGISTER RD/WR BIT 7 FLGR0 RD C4OV FLGR1 RD C8OV FLGR2 RD C12OV* * Bits C11UV, C12UV, C11OV, and C12OV are always low if the CELL10 bit in register CFGR0 is high ...
Page 26
LTC6802-1 APPLICATIONS INFORMATION Table 12. Memory Bit Descriptions NAME DESCRIPTION CDC Comparator Duty Cycle CELL10 10-Cell Mode LVLPL Level Polling Mode GPIO1 GPIO1 Pin Control GPIO2 GPIO2 Pin Control WDT Watchdog Timer DCCx Discharge Cell x VUV Undervoltage Comparison Voltage* ...
Page 27
APPLICATIONS INFORMATION SERIAL COMMAND EXAMPLES LTC6802-1 (Daisy Chained Configuration) Examples below use a configuration of three stacked devices: bottom (B), middle (M), and top (T) Write Configuration Registers 1. Pull CSBI low 2. Send WRCFG command byte 3. Send CFGR0 ...
Page 28
LTC6802-1 APPLICATIONS INFORMATION Poll Interrupt Status (Level Polling) 1. Pull CSBI low 2. Send PLINT command byte 3. SDO output from bottom device pulled low if any device has an interrupt condition; otherwise, SDO high 4. Pull CSBI high to ...
Page 29
APPLICATIONS INFORMATION Battery Interconnection Integrity The FMEA scenarios that are potentially most damaging are those that involve a break in the stack of battery cells. When the battery stack has a discontinuity between groupings of cells monitored by LTC6802-1 ICs, ...
Page 30
LTC6802-1 APPLICATIONS INFORMATION Cell-Voltage Filtering The LTC6802-1 employs a sampling system to perform its analog-to-digital conversions and provides a conver- sion result that is essentially an average over the 0.5ms conversion window, provided there isn’t noise aliasing with respect to ...
Page 31
APPLICATIONS INFORMATION in this case. Probe loads up to about 1mA maximum are supported in this configuration. Since V during the LTC6802-1 idle and shutdown modes, the thermistor drive is also shut off and thus power dissipa- tion minimized. Since ...
Page 32
LTC6802-1 APPLICATIONS INFORMATION stack potential. Figure 18 shows a means of providing both of these features. A resistor divider is used to provide a low-voltage representation of the full stack potential (C12 to C0 voltage) with MOSFETs that decouple the ...
Page 33
APPLICATIONS INFORMATION PROVIDING HIGH-SPEED OPTO-ISOLATION OF THE SPI DATA-PORT Isolation techniques that are capable of supporting the 1Mbps data rate of the LTC6802-1 require more power on the isolated (battery) side than can be furnished by the V output of ...
Page 34
LTC6802-1 APPLICATIONS INFORMATION PCB LAYOUT CONSIDERATIONS The V and V pins should be bypassed with a 1μF REG REF capacitor for best performance. The LTC6802-1 is capable of operation with as much as + – 60V between V and V ...
Page 35
APPLICATIONS INFORMATION Converter Details The LTC6802-1’s ADC has a second order delta sigma modulator followed by a Sinc2, finite impulse response (FIR) digital filter. The front-end sample rate is 512ksps, which greatly reduces input filtering requirements. A simple 16kHz, 1 ...
Page 36
LTC6802-1 PACKAGE DESCRIPTION 7.8 – 8.2 0.25 0.05 RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 – 5.60* (.197 – .221) PARTING LINE 0.55 – 0.95** 0.10 – 0.25 (.004 – .010) (.022 – ...
Page 37
... Edit to Figure 12 Edit to Typical Application Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC6802-1 ...
Page 38
... SCKI *REQUIRES 1k PULL-UP RESISTOR AT HOST DEVICE (SIGNAL NOT USED FOR CURRENT-MODE COMMUNICATION) 10k NTC2 8 100Ω 1/2 LT6004 10nF 2 – 10k 7 NTC1 1/2 LT6004 6 – 100Ω 4 10nF LT 0110 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2009 68021fa ...