CY7C1021B-15VC Cypress Semiconductor Corp, CY7C1021B-15VC Datasheet

IC SRAM 1MBIT 15NS 44SOJ

CY7C1021B-15VC

Manufacturer Part Number
CY7C1021B-15VC
Description
IC SRAM 1MBIT 15NS 44SOJ
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1021B-15VC

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
1M (64K x 16)
Speed
15ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-SOJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1010

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1021B-15VC
Manufacturer:
CY
Quantity:
1 000
Part Number:
CY7C1021B-15VC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-05145 Rev. **
Features
Functional Description
The CY7C1021B/10211B is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
Selection Guide
Logic Block Diagram
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
• High speed
• CMOS for optimum speed/power
• Low active power
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
A
A
A
A
A
A
A
A
— t
— 825 mW (max.)
1
0
7
6
5
4
3
2
AA
= 10, 12, 15 ns
DATA IN DRIVERS
COLUMN DECODER
512 X 2048
RAM Array
64K x 16
1
through I/O
3901 North First Street
Commercial
Commercial
Commercial
L
8
), is
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O
then data from memory will appear on I/O
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1021B/10211B is available in standard 44-pin
TSOP Type II and 400-mil-wide SOJ packages. Customers
should use part number CY7C10211B when ordering parts
with 10ns t
7C10211B-10
I/O
I/O
1021B-1
15
aa
150
1
9
0.5
BHE
WE
CE
OE
BLE
10
10
San Jose
). If Byte High Enable (BHE) is LOW, then data
–I/O
–I/O
, and CY7C1021B when ordering 12 and 15ns t
8
16
1
9
to I/O
through I/O
64K x 16 Static RAM
8
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
V
Pin Configuration
WE
A
A
A
A
NC
CE
. If Byte High Enable (BHE) is LOW,
7C1021B-12
CC
A
A
A
A
A
SS
15
14
13
12
1
4
3
2
1
0
1
2
3
4
5
6
7
8
CA 95134
through I/O
SOJ / TSOP II
140
13
14
15
16
17
18
19
20
21
22
0.5
1
2
3
4
5
6
7
8
9
10
11
12
12
10
16
Top View
0
Revised September 6, 2001
) is written into the location
through A
CY7C10211B
CY7C1021B/
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
16
9
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
NC
) are placed in a
15
SS
CC
5
6
7
8
9
10
11
to I/O
1021B-2
7C1021B-15
16
15
14
13
12
11
10
9
).
408-943-2600
130
16
0.5
15
10
. See the
aa
0
.

Related parts for CY7C1021B-15VC

CY7C1021B-15VC Summary of contents

Page 1

... BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1021B/10211B is available in standard 44-pin TSOP Type II and 400-mil-wide SOJ packages. Customers should use part number CY7C10211B when ordering parts through I with 10ns t , and CY7C1021B when ordering 12 and 15ns I/O –I/O 1 I/O – ...

Page 2

... MAX RC Max > > < MAX Max > L 0.5 V – 0.3V, V > – 0.3V < 0.3V CY7C1021B/ CY7C10211B Ambient [2] Temperature + 10% – + 10% 7C1021B-12 7C1021B-15 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2.2 6.0 2.2 6.0 –0.5 0.8 –0.5 0.8 –1 +1 –1 +1 –1 +1 –1 +1 –300 – ...

Page 3

... OUTPUT Equivalent to: THÉVENIN EQUIVALENT Document #: 38-05145 Rev. ** Test Conditions MHz 5. 481 5V 3.0V R2 GND 5 pF 255 INCLUDING JIG AND Rise Time: 1 V/ns SCOPE (b) 1021B-3 167 1.73V 30 pF CY7C1021B/ CY7C10211B Max. Unit ALL INPUT PULSES 90% 90% 10% 10% Fall Time:1 V/ns 1021B-4 Page ...

Page 4

... The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write. Document #: 38-05145 Rev. ** 7C10211B-10 Min. Max [ [ [ less than less than t HZCE LZCE HZOE LZOE CY7C1021B/ CY7C10211B 7C1021B-12 7C1021B-15 Min. Max. Min. Max ...

Page 5

... Device is continuously selected. OE, CE, BHE and/or BHE = V 10 HIGH for read cycle. 11. Address valid prior to or coincident with CE transition LOW. Document #: 38-05145 Rev OHA t RC ACE t DOE t LZOE t DBE t LZBE 50 CY7C1021B/ CY7C10211B DATA VALID t HZOE t HZCE t HZBE HIGH IMPEDANCE DATA VALID t PD 50% 1021B-5 I ICC CC I ISB SB 1021B-6 Page ...

Page 6

... ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 12. Data I/O is high impedance BHE and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05145 Rev. ** [12, 13 SCE PWE PWE t SCE . IH CY7C1021B/ CY7C10211B 1021B 1021B-8 Page ...

Page 7

... High Z Read - Lower bits only Data Out Read - Upper bits only Data In Write - All bits High Z Write - Lower bits only Data In Write - Upper bits only High Z Selected, Outputs Disabled High Z Selected, Outputs Disabled CY7C1021B/ CY7C10211B LZWE 1021B-10 Mode Power Standby (I SB ...

Page 8

... Ordering Information Speed (ns) Ordering Code 10 CY7C10211B-10VC CY7C10211B-10ZC CY7C10211BL-10ZC 12 CY7C1021B-12VC CY7C1021B-12VI CY7C1021BL-12VC CY7C1021B-12ZC CY7C1021B-12ZI CY7C1021BL-12ZC 15 CY7C1021B-15VC CY7C1021B-15VI CY7C1021BL-15VC CY7C1021B-15ZC CY7C1021B-15ZI CY7C1021BL-15ZC Document #: 38-05145 Rev. ** Package Name Package Type V34 44-Lead (400-Mil) Molded SOJ Z44 44-Lead TSOP Type II Z44 44-Lead TSOP Type II V34 ...

Page 9

... Package Diagrams Document #: 38-05145 Rev. ** 44-Lead (400-Mil) Molded SOJ V34 CY7C1021B/ CY7C10211B 51-85082-B Page ...

Page 10

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 44-Pin TSOP II Z44 CY7C1021B/ CY7C10211B 51-85087-A ...

Page 11

... Document Title: CY7C1021B / CY7C10211B 64K x 16 Static RAM Document Number: 38-05145 Issue REV. ECN NO. Date ** 109889 09/22/01 Document #: 38-05145 Rev. ** Orig. of Change Description of Change SZV Change from Spec number: 38-00951 to 38-05145 CY7C1021B/ CY7C10211B Page ...

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