W9864G6JH-6 Winbond Electronics, W9864G6JH-6 Datasheet - Page 17

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W9864G6JH-6

Manufacturer Part Number
W9864G6JH-6
Description
IC SDRAM 64MB 166MHZ 54TSOPII
Manufacturer
Winbond Electronics
Datasheet

Specifications of W9864G6JH-6

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (4M x 16)
Speed
166MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.3 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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8. These parameters account for the number of clock cycles and depend on the operating frequency
9. Assumed input rise and fall time (t
10. If clock rising time (t
CKE to clock disable (CKE Latency)
DQM to output to HI-Z (Read DQM Latency)
DQM to output to HI-Z (Write DQM Latency)
Write command to input data (Write Data Latency)
Precharge to DQ Hi-Z Lead time
Precharge to Last Valid data out
Bust Stop Command to DQ Hi-Z Lead time
Bust Stop Command to Last Valid Data out
Read with Auto-precharge Command to Active/Ref Command
Write with Auto-precharge Command to Active/Ref Command
CS to Command input ( CS Latency)
of the clock, as follows the number of clock cycles = specified value of timing/ clock period (count
fractions as whole number)
(1)
If tr & tf is longer than 1nS, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]nS should be added to the parameter
( The
(2)A.C Latency Characteristics
t
t
CH
CL
t
is the pulse width of CLK measured from the positive edge to the negative edge referenced to V
T maximum can’t be more than 10nS for low frequency application. )
is the pulse width of CLK measured from the negative edge to the positive edge referenced to V
T
) is longer than 1nS, (t
T
) = 1nS.
T
/2-0.5)nS should be added to the parameter.
- 17 -
CL = 2
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
Publication Release Date: Aug. 31, 2010
BL + t
BL + t
(BL+1) + t
(BL+1) + t
RP
RP
W9864G6JH
1
2
0
0
0
2
3
1
2
2
3
1
2
RP
RP
IH
IL
(min.).
(max.).
Revision A02
t
CK
t
CK
+ nS

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