C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 306

• Manufacturer Part Number: C8051F989-GUR
• Description: 8-bit Microcontrollers - MCU 4kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F989-GUR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

C8051F99x-C8051F98x
26.3.5.1. 8-Bit Pulse Width Modulator Mode
The duty cycle of the PWM output signal in 8-bit PWM mode is varied using the module's PCA0CPLn
capture/compare register. When the value in the low byte of the PCA counter/timer (PCA0L) is equal to the
value in PCA0CPLn, the output on the CEXn pin will be set. When the count value in PCA0L overflows, the
CEXn output will be reset (see Figure 26.8). Also, when the counter/timer low byte (PCA0L) overflows from
0xFF to 0x00, PCA0CPLn is reloaded automatically with the value stored in the module’s capture/compare
high byte (PCA0CPHn) without software intervention. Setting the ECOMn and PWMn bits in the
PCA0CPMn register, and setting the CLSEL bits in register PCA0PWM to 00b enables 8-Bit Pulse Width
Modulator mode. If the MATn bit is set to 1, the CCFn flag for the module will be set each time an 8-bit
comparator match (rising edge) occurs. The COVF flag in PCA0PWM can be used to detect the overflow
(falling edge), which will occur every 256 PCA clock cycles. The duty cycle for 8-Bit PWM Mode is given in
Equation 26.2.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0
Capture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Using Equation 26.2, the largest duty cycle is 100% (PCA0CPHn = 0), and the smallest duty cycle is
0.39% (PCA0CPHn = 0xFF). A 0% duty cycle may be generated by clearing the ECOMn bit to 0.
306
PCA0CPLn
Write to
Reset
PCA0CPHn
A
R
S
E
L
0
Write to
C
O
PCA0PWM
E
V
x
C
O
V
F
0
ENB
ENB
1
C
S
E
L
L
1
0
C
L
S
E
L
0
0
W
M
P
1
6
n
0
E
C
O
M
n
PCA0CPMn
C
A
P
P
n
0 0 x 0
Figure 26.8. PCA 8-Bit PWM Mode Diagram
C
A
P
N
n
M
A
T
n
Equation 26.2. 8-Bit PWM Duty Cycle
O
G
T
n
Duty Cycle
P
W
M
n
C
C
E
F
n
x
PCA Timebase
Enable
=
PCA0CPHn
Comparator
PCA0CPLn
Rev. 1.1

-------------------------------------------------- -
PCA0L
256 PCA0CPHn
8-bit
–
256
Overflow
COVF
match
S
R
SET
CLR

Q
Q
CEXn
Crossbar
Port I/O