NCP4303AMNTWG ON Semiconductor, NCP4303AMNTWG Datasheet

no-image

NCP4303AMNTWG

Manufacturer Part Number
NCP4303AMNTWG
Description
Power Switch ICs - Power Distribution SEC SIDE SYNC RECT DRV
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP4303AMNTWG

Product Category
Power Switch ICs - Power Distribution
NCP4303A, NCP4303B
Secondary Side
Synchronous Rectification
Driver for High Efficiency
SMPS Topologies
control synchronous rectification circuitry in switch mode power
supplies. Thanks to its versatility, it can be used in various topologies
such as flyback, forward and Half Bridge Resonant LLC.
helps to fight the ringing induced by the PCB layout and other
parasitic elements. Therefore, a reliable and noise less operation of the
SR system is insured.
of the driver and automatic package parasitic inductance
compensation system allow to maximize synchronous rectification
MOSFET conduction time that enables further increase of SMPS
efficiency.
driver voltage clamp eases implementation of the SR system in 24 V
output applications.
Features
Typical Applications
© Semiconductor Components Industries, LLC, 2011
June, 2011 − Rev. 4
The NCP4303A/B is a full featured controller and driver tailored to
The combination of externally adjustable minimum on and off times
The extremely low turn off delay time, high sink current capability
Finally, a wide operating V
and QR Flyback Applications
Threshold
Performance in Applications that Work in Deep CCM
Self−Contained Control of Synchronous Rectifier in CCM, DCM,
Precise True Secondary Zero Current Detection with Adjustable
Automatic Parasitic Inductance Compensation Input
Typically 40 ns Turn off Delay from Current Sense Input to Driver
Zero Current Detection Pin Capability up to 200 V
Optional Ultrafast Trigger Interface for Further Improved
Disable Input to Enter Standby or Low Consumption Mode
Adjustable Minimum On Time Independent of V
Adjustable Minimum Off Time Independent of V
5 A / 2.5 A Peak Current Sink / Source Drive Capability
Operating Voltage Range up to 30 V
Gate Drive Clamp of Either 12 V (NCP4303A) or 6 V (NCP4303B)
Low Startup and Standby Current Consumption
Maximum Frequency of Operation up to 500 kHz
SOIC−8 Package
These are Pb−Free Devices
Notebook Adapters
High Power Density AC/DC Power Supplies
Gaming Consoles
All SMPS with High Efficiency Requirements
CC
range combined with two versions of
CC
CC
Level
Level
1
(NOTE: For DFN the exposed pad must be either
unconnected or preferably connected to ground.
The GND pin must be always connected to ground.)
†For information on tape and reel specifications,
NCP4303ADR2G
NCP4303BDR2G
NCP4303AMNTWG
NCP4303BMNTWG
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
8
(*Note: Microdot may be in either location)
1
Device
Trig/Disable
1
4303x
A
L
Y
W
G
Min_Toff
Min_Ton
ORDERING INFORMATION
PINOUT INFORMATION
V
http://onsemi.com
CC
CASE 488AF
CASE 751
D SUFFIX
= Specific Device Code
x = A or B
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
SOIC−8
DFN8
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
Package
SOIC−8
SOIC−8
1
2
3
4
DFN8
DFN8
Publication Order Number:
8
7
6
5
DRV
GND
COMP
CS
8
1
MARKING
DIAGRAM
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
ALYWG
Shipping
ALYW G
4303x
NCP
4303x
2500 /
2500 /
4000 /
4000 /
NCP4303/D
G
G

Related parts for NCP4303AMNTWG

NCP4303AMNTWG Summary of contents

Page 1

... CC The GND pin must be always connected to ground.) Level CC ORDERING INFORMATION Device NCP4303ADR2G NCP4303BDR2G NCP4303AMNTWG NCP4303BMNTWG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1 http://onsemi.com MARKING ...

Page 2

Figure 1. Typical Application Example – LLC Converter Figure 2. Typical Application Example − DCM CCM Flyback Converter http://onsemi.com 2 ...

Page 3

PIN FUNCTION DESCRIPTION Pin No. Pin Name Function 1 VCC Supplies the driver 2 Min_toff Minimum off time adjust 3 Min_ton Minimum on time adjust 4 TRIG/Disable Forced reset input 5 CS Current sense of the SR MOSFET 6 COMP ...

Page 4

MAXIMUM RATINGS Symbol V IC supply voltage CC V Driver output voltage DRV V Current sense input dc voltage CS V Current sense input dynamic voltage (t Csdyn V Trigger input voltage TRIG Min_Ton and Min_Toff input ...

Page 5

ELECTRICAL CHARACTERISTICS (For typical values nF load _min_ton _min_toff otherwise noted) Symbol SUPPLY SECTION V Turn−on threshold level (V CC_on V Minimum operating voltage after turn−on (V CC_off V V ...

Page 6

ELECTRICAL CHARACTERISTICS (For typical values nF load _min_ton _min_toff otherwise noted) Symbol CS INPUT input leakage current Leakage TRIGGER/DISABLE INPUT T Minimum trigger pulse duration ...

Page 7

TEMPERATURE (°C) Figure 4. V Startup Voltage CC 1.07 1.065 1.06 1.055 1.05 1.045 1.04 1.035 −40 −25 − TEMPERATURE ...

Page 8

TEMPERATURE (°C) Figure 10. Driver High Level – B Version and load 9.96 9.94 ...

Page 9

TEMPERATURE (°C) Figure 16. Driver Clamp Level – B Version and C CC load ...

Page 10

TEMPERATURE (°C) Figure 22. Trigger Input Threshold Voltage 117 116.5 116 115.5 115 114.5 114 113.5 113 −40 −25 − TEMPERATURE (°C) Figure ...

Page 11

TEMPERATURE (°C) Figure 28. Minimum on Time @ 5340 5320 5300 5280 5260 5240 5220 5200 5180 −40 −25 −10 5 ...

Page 12

General Description The NCP4303 is designed to operate either as a standalone companion primary side controller to help achieve efficient synchronous rectification in switch mode power supplies. This controller features a high current ...

Page 13

Figure 33. ZCD Sensing Circuitry Functionality When the voltage on the secondary winding of the SMPS reverses, the body diode of M1 starts to conduct current and the voltage of M1’s drain drops approximately to −1 V. The CS pin ...

Page 14

Figure 34. ZCD Comparators Thresholds and Blanking Periods Timing resistor is used, the turn−on and turn−off shift_cs thresholds are fully given by the CS input specification (please refer to parametric table). Once non−zero R resistor is used, ...

Page 15

Figure 35. Waveforms from SR System Using MOSFET in TO220 Package without Parasitic Inductance Compensation – SR MOSFET Channel Conduction Time is Reduced Note that the efficiency impact of the error caused by parasitic inductance increases with lower R MOSFETs ...

Page 16

Typical value of compensation inductance for a TO220 package is 7 nH. The parasitic inductance can differ depends on how much are the leads shortened during the assembly process. The compensation inductance design has to be done with enough margin ...

Page 17

Figure 38. Recommended Layout for SO8 Package When Parasitic Inductance Compensation is Used Trigger/Disable input The NCP4303 features an ultrafast trigger input that exhibits a typically delay from its activation to the turn−off of the SR MOSFET. ...

Page 18

Figure 41. Trigger Input Functionality Waveforms The NCP4303 operation can be disabled using the trigger/disable input. If the trigger/disable input is pulled up (above 1.5 V) the driver is disabled immediately. In some cases, the driver is activated one more ...

Page 19

Figure 43. Operating Waveforms for the Trig/Disable Input – Device Sleep Mode Transition – Case 2 Figure 44. Operating Waveforms for the Trig/Disable Input − Device Sleep Mode Transition − Case 3 Figure 45. Operating Waveforms for the Trig/Disable Input ...

Page 20

Figure 46. Operating Waveforms for the Trig/Disable Input with a Trigger Signal that is Periodical and Overlaps Note that the trigger input is an ultrafast input that doesn’t feature any internal filtering and reacts even on very narrow voltage pulses. ...

Page 21

Minimum T and T Adjustment on off The NCP4303 offers adjustable minimum ON and OFF time periods that ease the implementation of the synchronous rectification system in a power supply. These Figure 48. Internal Connection of the Min_Ton Generator (the ...

Page 22

The absolute minimum T duration is internally clamped on to 300 ns and minimum T duration to 600 ns in order to off prevent any potential issues with the minimum T T input being shorted to GND. off Some applications ...

Page 23

Note that R and R should be designed in such drain1 drain2 a way that the maximum pulse current into the Min_Toff adjust pin is below 10 mA. Voltage on the min T pins is clamped by internal zener protection ...

Page 24

This method drv_low_eq simplifies power losses calculations and still provides Figure 54. Equivalent Schematic of Gate Drive Circuitry ...

Page 25

NCP4303B 140 120 NCP4303A, 100 NCP4303B 100 150 200 250 300 OPERATING FREQUENCY (kHz) Figure 55. IC Power Consumption as ...

Page 26

R36 GND 8k2 27R R30 27R 2R2 R22 D15 1k0 R33 P6KE180A 5k6 R14 MMSD4143 D14 + 1N4007 1N4007 D3 D5 R15 1N4007 1N4007 33k D2 D4 ...

Page 27

Figure 61. CCM Flyback Application with SR Sleep Mode Implemented via VCC Pin http://onsemi.com 27 ...

Page 28

... C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004) ...

Page 29

... NOTE 3 0.05 C 0.80 PITCH *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

Page 30

...

Related keywords