24LC65-I/SM Microchip Technology, 24LC65-I/SM Datasheet - Page 13

• Manufacturer Part Number: 24LC65-I/SM
• Description: IC EEPROM 64KBIT 400KHZ 8SOIC
• Manufacturer: Microchip Technology

Specifications of 24LC65-I/SM

• Memory Size: 64K (8K x 8)
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 100kHz, 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 6.0 V
• Organization: 8 K x 8
• Interface Type: I2C
• Maximum Clock Frequency: 0.4 MHz
• Access Time: 900 ns
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 8-2:
FIGURE 8-3:
© 2008 Microchip Technology Inc.
1 Write command initiated at byte 0 of page 3 in the array;
Last 2 bytes
loaded into
page 0 of cache.
3 Write from cache into array initiated by STOP bit.
First data byte is loaded into the cache byte 0.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
6
page 0
page 0
Last 3 pages in cache written to next row in array.
page 1 page 2
page 1 page 2
page 0
page 0 page 1 page 2
3
byte 0
cache
cache
byte 0
CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY
CACHE WRITE TO THE ARRAY STARTING AT A NON-PAGE BOUNDARY
page 1 page 2
byte 1
cache
cache
byte 1
byte 0
cache page 0
1 Write command initiated; 64 bytes of data
loaded into cache starting at byte 2 of page 0.
cache
byte 2
byte 1
4 Write from cache into array initiated by STOP bit.
• • •
byte 0
5
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
• • •
Last page in cache written to page 2 in next row.
byte 2
cache
byte 7
byte 1
cache
byte 7
page 3
page 3
byte 3
cache page 1
bytes 8-15
• • •
cache page 1
24AA65/24LC65/24C65
bytes 8-15
byte 4
2 64 bytes of data are loaded into cache.
byte 7
4 Remaining pages in cache are written
• • •
cache page 2
bytes 16-23
cache page 2
to sequential pages in array.
bytes 16-23
page 4
page 4
byte 7
2 Last 2 bytes loaded 'roll over'
to beginning.
• • •
• • •
page 4
page 4
• • •
5
• • •
Remaining bytes in cache are
written sequentially to array.
page 7
page 7
• • •
• • •
cache page 7
bytes 56-63
array row n
array row n + 1
page 7
page 7
cache page 7
bytes 56-63
DS21073K-page 13
array
array
row
n + 1
row n