Si2161-D-GMR Silicon Labs, Si2161-D-GMR Datasheet

Si2161-D-GMR

Manufacturer Part Number

Si2161-D-GMR

Description

Modulator / Demodulator DVB-T demodulator QFN-36, 5x6x0.75mm

Manufacturer

Silicon Labs

Type

Demodulatorr

Datasheet

1.SI2161-D-GMR.pdf (2 pages)

Specifications of Si2161-D-GMR

Rohs

yes

Package / Case

QFN-36

Interface Type

I2C

Maximum Operating Temperature

+ 85 C

Maximum Power Dissipation

140 mW

Minimum Operating Temperature

0 C

Modulation Type

Digital TV

Mounting Style

SMD/SMT

Operating Supply Voltage

1.2 V, 3.3 V

Operating Temperature Range

0 C to + 85 C

Operating Voltage

1.2 V, 3.3 V

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

SI2161-D-GMR

Quantity:

4 900

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Description

The Si2161 is a compact, standalone DVB-T digital TV

demodulator ideally matching Silicon Labs’ Si2170/1/2 new

hybrid silicon tuner product family. The analog front-end consists

of two ADCs with wide dynamic range (12-bit) to allow operation

with standard IF (~36 MHz), Low-IF, or Zero-IF inputs. This

enables the use of the Si2161 with any TV tuner, either metal can

or silicon tuner based.

The demodulator supports all modes of DVB-T (EN 300 744),

including hierarchical modes. In addition to DVB-T's 2 K and 8 K

FFT modes, the Si2161 also includes a 4 K FFT mode, “native”

and “in-depth” deinterleavers, and extended TPS to be compliant

with DVB-H (EN 300 744 Annex F). The Si2161 can then receive

DVB-H programs in fixed receiver applications (without decoding

DVB-H's additional MPE FEC layer).

Sophisticated on-chip algorithms ensure optimum reception

even under difficult channel conditions, such as echoes outside

the guard interval, pre-echoes, or strong impulse noise. For

ease-of-use, DSP firmware is preloaded into ROM (device is

immediately active at powerup). Nevertheless, there is a

possibility of downloading additional patch code via the I

interface, e.g. to adjust the demodulator to unexpected

conditions or reception impairments.

The Si2161 supports ultra-fast channel scanning for VHF/UHF

terrestrial DTV channels, thanks to proprietary features. For

supported tuners, the complete algorithm for fast channel scan,

QuickScan, is provided as a downloadable patch file. QuickScan

runs on the embedded DSP to limit the host CPU burden.

Serial or parallel master MPEG TS output modes are supported.

Furthermore, a TS slave parallel mode is available via a GPIF

port and provides a glueless interface to Silicon Labs' MCU

devices with embedded USB interface. The user can optionally

program a 32-PID hardware filter to reduce the output TS bit

rate.

An internal I

This provides a “quiet” I

A maximum of six general-purpose inputs/outputs are available;

three GPIOs also feature / and interrupt output capabilities.

Best-in-class demodulation performance is achieved while still

maintaining very low-power operation.

The Si2161 guarantees a low-cost system implementation due to

its minimal BOM and very small package footprint.

Digital TV Demodulator

embedded

C pass-through logic switch acts as an I

32-bit

C bus to the RF front end.

DSP

TUN_SDA

TUN_SCL

ADC_QP

ADC_QN

RF_AGC

4 MHz

ADC_IN

ADC_IP

IF_AGC

RSSI

16,20,24,27 MHz

controls

SWITCH

12-bit

Dual

AGC

ADC

8-bit

device

1.2, 3.3V

FRONT

& PLL

END

OSC

C repeater.

operation.

DEMOD

DVB-T

Si2161

EQUALI

DSP

ZER

Features

Applications

DVB-T (ETSI EN 300 744) demodulator and FEC decoder.

NorDig Unified 2.0, D-Book 4.0 compliant.

Suitable for low-power design: 130 mW (typical, 36 MHz IF

sampling mode).

Dual 12-bit ADCs: accept 1

6, 7, or 8 MHz channel bandwidths.

DSP-based synchronization and control with embedded ROM

code avoids the need for code download at startup.

Supports patch code downloads for in-field upgradeability.

Independent AGC controls (for IF & RF),

plus RSSI measurement.

ACI filtering: fixed 8 MHz SAW filter even for 7 MHz channel.

Advanced performance for SFN networks.

Impulsive noise protection algorithm.

Ultra-fast automatic UHF/VHF band scanning (QuickScan).

Master TS output modes, parallel or serial

(with tri-state function).

Slave TS parallel output: external device polls data from an

embedded FIFO, providing a seamless interface to any USB

controller.

On-chip PID filtering to reduce TS output bit rate.

Up to six GPIOs.

Two 5 V-tolerant I

with on-chip I

4, 16, 20, 24, or 27 MHz clock/crystal reference.

3.3 and 1.2 V power supplies only.

Very compact QFN-36, 5 x 6 mm, RoHS-compliant package.

Digital terrestrial STB, NIM, and iDTV set

Digital terrestrial PC-TV tuner peripheral

Digital Picture Frame with TV front-end

Portable DVB-T receiver/DVD player/PMP

Personal Video Recorder (DVD or HDD-based)

FEC

RESETB

FILTER

CTRL

PID

µP

I/F

C repeater.

GPIO

I/F

C control buses (host-side, tuner-side) 

TS_SYNC

TS_VAL

TS_ERR

TS_CLK

TS_DATA

HOST_SDA

HOST_SCL

DVB-T Demodulator

GPIO0..5

IF, low IF, or zero-IF inputs in 5,

Si2161

6.18.2009

Related parts for Si2161-D-GMR

Si2161-D-GMR Summary of contents

Page 1

... The analog front-end consists of two ADCs with wide dynamic range (12-bit) to allow operation with standard IF (~36 MHz), Low-IF, or Zero-IF inputs. This enables the use of the Si2161 with any TV tuner, either metal can or silicon tuner based. The demodulator supports all modes of DVB-T (EN 300 744), including hierarchical modes. In addition to DVB-T and 8 K FFT modes, the Si2161 also includes FFT mode, “ ...

Page 2

... SLP QFN-36 Package Information 18 TS_DATA[6] 17 TS_DATA[5] TS_DATA[4]/GPIO_5 16 15 VDD_VIO 14 TS_DATA[3]/GPIO_4 13 TS_DATA[2]/GPIO_3 12 TS_DATA[1]/GPIO_1 11 TS_DATA[0]/TS_SER 9 10 Copyright © 2009 by Silicon Laboratories Si2161 DVB-T Demodulator Typ Max Unit 25 85 °C — — 400 kHz — MHz 1.2 1. ...

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