V385AEGLF IDT, V385AEGLF Datasheet - Page 6

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V385AEGLF

Manufacturer Part Number
V385AEGLF
Description
LVDS Interface IC
Manufacturer
IDT
Datasheet

Specifications of V385AEGLF

Rohs
yes
V385A Datasheet
I DT • 2 0 6 4 S i l v e r C r e ek Va l l e y R o a d, S a n J os e , CA 9 5 1 3 8 • t e l ( 8 0 0 ) 3 4 5 - 7 0 1 5 • w w w. i dt . c o m
AC Timing Diagrams
Figure AC1. Transmitter Setup/Hold and High/Low Times (Falling Edge Strobe or R_FB=0)
Figure AC2. Clock IN to Clock OUT Delay (Rising Edge Strobe or R_FB=1)
Figure AC3. Phase Lock Loop Set Time
V385A
8-B
TxIN[27:0]
TxCLKIN
IT
TxCLK OUT+
TxCLK OUT-
PWRDWN#
LVDS T
TxCLK IN
~3.3V
~3.3V
TxCLK IN
~0V
~0V
VCC
0.8V
RANSMITTER FOR
1.5V
2.0V
2.0V
0.8V
TSTC
TCIH
TCIP
V
TCCD
IDEO
6
Data is sampled on the falling edge of clock (pin R_FB = 0)
THTC
TCIL
Unknown
TPLLS
6/6/07
Revision 1.2

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