XRT83SL314ES Exar, XRT83SL314ES Datasheet - Page 2

• Manufacturer Part Number: XRT83SL314ES
• Description: LIN Transceivers 14 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL314ES

• Product Category: LIN Transceivers
• Rohs: yes

XRT83SL314
REV. 1.0.1
FEATURES
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Fully integrated 14-Channel short haul transceivers
for
applications.
T1/E1/J1 short haul and clock rate are per port
selectable through software without changing
components.
Internal Impedance matching on both receive and
transmit for 75Ω (E1), 100Ω (T1), 110Ω (J1), and
120Ω (E1) applications are per port selectable
through software without changing components.
Power down on a per channel basis with
independent receive and transmit selection.
Five pre-programmed transmit pulse settings for T1
short haul applications.
Arbitrary Pulse Generators for both T1 and E1
modes.
On-Chip
limiting protects line drivers from damage on a per
channel basis.
Independent Crystal-Less digital jitter attenuators
(JA) with 32-Bit or 64-Bit FIFO for the receive and
transmit paths
On-Chip frequency multiplier generates T1 or E1
master clocks from a variety of external clock
sources (8, 16, 56, 64, 128, 256kHz and 1X, 2X,
4X, 8X T1 or E1)
Driver failure monitor output (DMO) alerts of
possible system or external component problems.
Transmit outputs and receive inputs may be "High"
impedance
applications on a per channel basis.
Support for automatic protection switching.
1:1 and 1+1 protection without relays.
Receive monitor mode handles 0 to 29dB resistive
attenuation (flat loss) along with 0 to 6dB cable loss
for both T1 and E1.
T1/J1
P
XRT83SL314IB
RODUCT
transmit
(1.544MHz)
for
N
UMBER
protection
short-circuit
and
PRODUCT ORDERING INFORMATION
or
E1
protection
(2.048MHz)
redundancy
304 Lead TBGA
P
ACKAGE
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
and
T
YPE
2
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Receiver line attenuation indication output in 1dB
steps.
Loss of signal (RLOS) according to ITU-T G.775/
ETS300233 (E1) and ANSI T1.403 (T1/J1).
Programmable receive slicer threshold (45%, 50%,
55%, or 68%) for improved receiver interference
immunity.
Programmable data stream muting upon RLOS
detection.
On-Chip HDB3/B8ZS encoder/decoder with an
internal 16-bit LCV counter for each channel.
On-Chip digital clock recovery circuit for high input
jitter tolerance.
QRSS pattern generator and detection for testing
and monitoring.
Error and bipolar violation insertion and detection.
Transmit all ones (TAOS) and in-band network loop
up and loop down code generation.
Automatic loop code detection for remote loopback
activation.
Supports local analog, remote, digital, and dual
loopback modes.
Low Power dissipation: 170mW per channel (50%
density).
250mW per channel maximum power dissipation
(100% density).
Single 3.3V supply operation (3V to 5V I/O
tolerant).
304-Pin TBGA package
-40°C to +85°C Temperature Range
Supports gapped clocks for mapper/multiplexer
applications.
O
PERATING
-40°C to +85°C
T
EMPERATURE
xr
R
ANGE